PIC16F785-E/SS Microchip Technology, PIC16F785-E/SS Datasheet - Page 18
![20 PIN, 3.5 KB STD FLASH, 128 RAM, 18 I/O PB FREE,](/photos/6/58/65895/150-20-ssop_sml.jpg)
PIC16F785-E/SS
Manufacturer Part Number
PIC16F785-E/SS
Description
20 PIN, 3.5 KB STD FLASH, 128 RAM, 18 I/O PB FREE,
Manufacturer
Microchip Technology
Series
PIC® 16Fr
Datasheets
1.PIC16F616T-ISL.pdf
(8 pages)
2.PIC16F785-ISS.pdf
(206 pages)
3.PIC16F785-ISS.pdf
(10 pages)
4.PIC16F785-ISS.pdf
(28 pages)
Specifications of PIC16F785-E/SS
Rohs Compliant
YES
Core Processor
PIC
Core Size
8-Bit
Speed
20MHz
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
17
Program Memory Size
3.5KB (2K x 14)
Program Memory Type
FLASH
Eeprom Size
256 x 8
Ram Size
128 x 8
Voltage - Supply (vcc/vdd)
2 V ~ 5.5 V
Data Converters
A/D 14x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 125°C
Package / Case
20-SSOP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
XLT20SS1-1 - SOCKET TRANSITION 20DIP 20SSOPAC162060 - HEADER INTRFC MPLAB ICD2 20PIN
Connectivity
-
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
- PIC16F616T-ISL PDF datasheet
- PIC16F785-ISS PDF datasheet #2
- PIC16F785-ISS PDF datasheet #3
- PIC16F785-ISS PDF datasheet #4
- Current page: 18 of 206
- Download datasheet (4Mb)
PIC16F785/HV785
2.2.2.2
The Option register is a readable and writable register,
which contains various control bits to configure the
TMR0/WDT prescaler, the external RA2/INT interrupt,
the TMR0 and the weak pull-ups on PORTA.
REGISTER 2-2:
DS41249E-page 16
bit 7
Legend:
R = Readable bit
-n = Value at POR
bit 7
bit 6
bit 5
bit 4
bit 3
bit 2-0
Note 1: A dedicated 16-bit WDT postscaler is available for the PIC16F785/HV785.
R/W-1
RAPU
See Section 15.5 “Watchdog Timer (WDT)” for more information.
OPTION_REG Register
RAPU: PORTA Pull-up Enable bit
1 = PORTA pull-ups are disabled
0 = PORTA pull-ups are enabled by individual port latch values in WPUA register
INTEDG: Interrupt Edge Select bit
1 = Interrupt on rising edge of RA2/AN2/T0CKI/INT/C1OUT pin
0 = Interrupt on falling edge of RA2/AN2/T0CKI/INT/C1OUT pin
T0CS: TMR0 Clock Source Select bit
1 = Transition on RA2/AN2/T0CKI/INT/C1OUT pin
0 = Internal instruction cycle clock (CLKOUT)
T0SE: TMR0 Source Edge Select bit
1 = Increment on high-to-low transition on RA2/AN2/T0CKI/INT/C1OUT pin
0 = Increment on low-to-high transition on RA2/AN2/T0CKI/INT/C1OUT pin
PSA: Prescaler Assignment bit
1 = Prescaler is assigned to the WDT
0 = Prescaler is assigned to the Timer0 module
PS<2:0>: Prescaler Rate Select bits
INTEDG
R/W-1
OPTION_REG: OPTION REGISTER
Bit Value TMR0 Rate WDT Rate
000
001
010
011
100
101
110
111
W = Writable bit
‘1’ = Bit is set
R/W-1
T0CS
1 : 2
1 : 4
1 : 8
1 : 16
1 : 32
1 : 64
1 : 128
1 : 256
R/W-1
T0SE
1 : 1
1 : 2
1 : 4
1 : 8
1 : 16
1 : 32
1 : 64
1 : 128
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared
(1)
R/W-1
PSA
Note:
To achieve a 1:1 prescaler assignment for
TMR0, assign the prescaler to the WDT by
setting PSA bit to ‘1’ in the OPTION Reg-
ister. See Section 5.4 “Prescaler”.
R/W-1
PS2
© 2008 Microchip Technology Inc.
x = Bit is unknown
R/W-1
PS1
R/W-1
PS0
bit 0
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