PIC16F785-E/SS Microchip Technology, PIC16F785-E/SS Datasheet - Page 44

• Manufacturer Part Number: PIC16F785-E/SS
• Description: 20 PIN, 3.5 KB STD FLASH, 128 RAM, 18 I/O PB FREE,
• Manufacturer: Microchip Technology
• Series: PIC® 16Fr

Specifications of PIC16F785-E/SS

• Rohs Compliant: YES
• Core Processor: PIC
• Core Size: 8-Bit
• Speed: 20MHz
• Peripherals: Brown-out Detect/Reset, POR, PWM, WDT
• Number Of I /o: 17
• Program Memory Size: 3.5KB (2K x 14)
• Program Memory Type: FLASH
• Eeprom Size: 256 x 8
• Ram Size: 128 x 8
• Voltage - Supply (vcc/vdd): 2 V ~ 5.5 V
• Data Converters: A/D 14x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 125°C
• Package / Case: 20-SSOP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: XLT20SS1-1 - SOCKET TRANSITION 20DIP 20SSOPAC162060 - HEADER INTRFC MPLAB ICD2 20PIN
• Connectivity: -
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

PIC16F785/HV785
4.3
PORTB is a 4-bit wide, bidirectional port. The corre-
sponding data direction register is TRISB (Register 4-
6). Setting a TRISB bit (= 1) will make the correspond-
ing PORTB pin an input (i.e., put the corresponding
output driver in a High-Impedance mode). Clearing a
TRISB bit (= 0) will make the corresponding PORTB
pin an output (i.e., put the contents of the output latch
on the selected pin). Example 4-2 shows how to initial-
ize PORTB.
Reading the PORTB register (Register 4-5) reads the
status of the pins, whereas writing to it will write to the
port latch. All write operations are read-modify-write
operations. Therefore, a write to a port implies that the
port pins are read, this value is modified and then writ-
ten to the port data latch.
Pin RB6 is an open drain output. All other PORTB pins
have full CMOS output drivers.
REGISTER 4-5:
REGISTER 4-6:
DS41249E-page 42
bit 7
Legend:
R = Readable bit
-n = Value at POR
bit 7-4
bit 3-0
bit 7
Legend:
R = Readable bit
-n = Value at POR
bit 7-4
bit 3-0
Note 1: Data latches are unknown after a POR, but each port bit reads ‘0’ when the corresponding analog select bit is
TRISB7
R/W-x
R/W-1
RB7
PORTB and TRISB Registers
‘1’ (see Register 12-2 on page 82).
RB<7:4>: PORTB General Purpose I/O Pin bits
1 = Port pin is greater than V
0 = Port pin is less than V
Unimplemented: Read as ‘0’
TRISB<7:4>: PORTB Tri-State Control bits
1 = PORTB pin configured as an input (tri-stated)
0 = PORTB pin configured as an output
Unimplemented: Read as ‘0’
TRISB6
R/W-x
R/W-1
RB6
PORTB: PORTB REGISTER
TRISB: PORTB TRI-STATE REGISTER
W = Writable bit
W = Writable bit
‘1’ = Bit is set
‘1’ = Bit is set
R/W-x
TRISB5
R/W-1
RB5
(1)
IL
IH
R/W-x
TRISB4
R/W-1
RB4
(1)
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared
The TRISB register controls the direction of the
PORTB pins, even when they are being used as ana-
log inputs. The user must ensure the bits in the TRISB
register are maintained set when using them as analog
inputs. I/O pins configured as analog input always read
‘0’.
EXAMPLE 4-2:
U-0
U-0
BCF
BCF
CLRF
BSF
BCF
BCF
MOVLW
MOVWF
BCF
—
—
Note:
STATUS,RP0
STATUS,RP1
PORTB
STATUS,RP0
ANSEL1,2
ANSEL1,3
30h
TRISB
STATUS,RP0
The ANSEL1 (93h) register must be initial-
ized to configure an analog channel as a
digital input. Pins configured as analog
inputs will read ‘0’.
U-0
U-0
—
—
INITIALIZING PORTB
© 2008 Microchip Technology Inc.
;Bank 0
;
;Init PORTB
;Bank 1
;digital I/O - RB4
;digital I/O - RB5
;Set RB<5:4> as inputs
;and set RB<7:6>
;as outputs
;Bank 0
x = Bit is unknown
x = Bit is unknown
U-0
U-0
—
—
U-0
U-0
—
—
bit 0
bit 0