AFS250-FGG256 Actel, AFS250-FGG256 Datasheet - Page 241

FPGA - Field Programmable Gate Array 250K System Gates

AFS250-FGG256

Manufacturer Part Number
AFS250-FGG256
Description
FPGA - Field Programmable Gate Array 250K System Gates
Manufacturer
Actel
Datasheet

Specifications of AFS250-FGG256

Processor Series
AFS250
Core
IP Core
Maximum Operating Frequency
1098.9 MHz
Number Of Programmable I/os
114
Data Ram Size
36864
Supply Voltage (max)
1.575 V
Maximum Operating Temperature
+ 70 C
Minimum Operating Temperature
0 C
Development Tools By Supplier
AFS-Eval-Kit, AFS-BRD600, FlashPro 3, FlashPro Lite, Silicon-Explorer II, Silicon-Sculptor 3, SI-EX-TCA
Mounting Style
SMD/SMT
Supply Voltage (min)
1.425 V
Number Of Gates
250 K
Package / Case
FPBGA-256
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

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Pin Descriptions
Supply Pins
GND
Ground supply voltage to the core, I/O outputs, and I/O logic.
GNDQ
Quiet ground supply voltage to input buffers of I/O banks. Within the package, the GNDQ plane is
decoupled from the simultaneous switching noise originated from the output buffer ground domain. This
minimizes the noise transfer within the package and improves input signal integrity. GNDQ needs to
always be connected on the board to GND. Note: In FG256, FG484, and FG676 packages, GNDQ and
GND pins are connected within the package and are labeled as GND pins in the respective package pin
assignment tables.
ADCGNDREF
Analog ground reference used by the ADC. This pad should be connected to a quiet analog ground.
GNDA
Quiet ground supply voltage to the Analog Block of Fusion devices. The use of a separate analog ground
helps isolate the analog functionality of the Fusion device from any digital switching noise. A 0.2 V
maximum differential voltage between GND and GNDA/GNDQ should apply to system implementation.
GNDAQ
Quiet ground supply voltage to the analog I/O of Fusion devices. The use of a separate analog ground
helps isolate the analog functionality of the Fusion device from any digital switching noise. A 0.2 V
maximum differential voltage between GND and GNDA/GNDQ should apply to system implementation.
Note: In FG256, FG484, and FG676 packages, GNDAQ and GNDA pins are connected within the
package and are labeled as GNDA pins in the respective package pin assignment tables. In FG256 and
GNDNVM
Ground supply used by the Fusion device's flash memory block module(s).
GNDOSC
Ground supply for both integrated RC oscillator and crystal oscillator circuit.
VCC15A
1.5 V clean analog power supply input for use by the 1.5 V portion of the analog circuitry.
VCC33A
3.3 V clean analog power supply input for use by the 3.3 V portion of the analog circuitry.
VCC33N
This is the –3.3 V output from the voltage converter. A 2.2 µF capacitor must be connected from this pin
to ground.
VCC33PMP
3.3 V clean analog power supply input for use by the analog charge pump. To avoid high current draw,
V
VCCNVM
1.5 V power supply input used by the Fusion device's flash memory block module(s). To avoid high
current draw, VCC should be powered up before or simultaneously with V
VCCOSC
Power supply for both integrated RC oscillator and crystal oscillator circuit. The internal 100 MHz
oscillator, powered by the VCCOSC pin, is needed for device programming, operation of the VDDN33
CC33PMP
should be powered up simultaneously with or after V
Ground
Ground (quiet)
Analog Reference Ground
Ground (analog)
Ground (analog quiet)
Flash Memory Ground
Oscillator Ground
Analog Power Supply (1.5 V)
Analog Power Supply (3.3 V)
Negative 3.3 V Output
Analog Power Supply (3.3 V)
Flash Memory Block Power Supply (1.5 V)
Oscillator Power Supply (3.3 V)
R e v i s i o n 1
CC33A
Actel Fusion Family of Mixed Signal FPGAs
.
CCNVM
.
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