SPEAR320-2 STMicroelectronics, SPEAR320-2 Datasheet - Page 39

• Manufacturer Part Number: SPEAR320-2
• Description: IC MPU ARM9 289LFBGA
• Manufacturer: STMicroelectronics
• Series: SPEAr®r

Specifications of SPEAR320-2

• Processor Type: ARM Microprocessor
• Speed: 333MHz
• Voltage: 1.14 V ~ 3.6 V
• Mounting Type: Surface Mount
• Package / Case: 289-LFBGA
• Processor Series: SPEAr320
• Core: ARM926EJ-S
• Data Bus Width: 16 bit
• Maximum Clock Frequency: 333 MHz
• Operating Supply Voltage: 1.2 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• Data Ram Size: 8 KB
• Interface Type: I2C, UART, USB, Serial
• Number Of Programmable I/os: 102
• Number Of Timers: 4
• Program Memory Size: 32 KB
• Program Memory Type: ROM
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Features: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant
• Other names: 497-10843

SPEAr320
1.
2.
3.
Table 12.
Test[0]
Test[1]
Test[2]
Test[3]
Test[4]
nTRST
TCK
TMS
TDI
TDO
PL_GPIO[97]
PL_GPIO[96]
PL_GPIO[95]
PL_GPIO[94]
PL_GPIO[93]
PL_GPIO[92]
PL_GPIO[91]
PL_GPIO[90]
PL_GPIO[89]
PL_GPIO[88]
PL_GPIO[87]
PL_GPIO[86]
PL_GPIO[85]
PL_GPIO[84]
PL_GPIO[83]
PL_GPIO[82]
Case 1 - All the PL_GPIO get values from Boundary scan registers during Ex-test
instruction of JTAG . Typically this configuration is used to verify correctness of the
soldering process during the production flow .
Case 2 - All the PL_GPIO maintain their original meaning but the JTAG Interface is
connected to the processor. This configuration is useful during the development phase
but offers only "static" debug.
Case 3 - Some PL_GPIO, as shown
connect the ETM9 lines to an external box. This configuration is typically used only
during the development phase. It offers a very powerful debug capability. When the
processor reaches a breakpoint it is possible, by analyzing the trace buffer, to
understand the reason why the processor has reached the break.
Signals
Ball sharing during debug
0
0
0
0
1
nTRST_bscan
TCK_bscan
TSM_bscan
TDI_bscan
TDO_bscan
BSR Value
BSR Value
BSR Value
BSR Value
BSR Value
BSR Value
BSR Value
BSR Value
BSR Value
BSR Value
BSR Value
BSR Value
BSR Value
BSR Value
BSR Value
BSR Value
Case 1 - no debug
Doc ID 16755 Rev 4
inTable 12: Ball sharing during
1
0
0/1
0/1
0/1
nTRST_ARM
TCK_ARM
TMS_ARM
TDI_ARM
TDO_ARM
Original meaning
Original meaning
Original meaning
Original meaning
Original meaning
Original meaning
Original meaning
Original meaning
Original meaning
Original meaning
Original meaning
Original meaning
Original meaning
Original meaning
Original meaning
Original meaning
Case 2 - static debug
0
1
0/1
0/1
0/1
nTRST_ARM
TCK_ARM
TSM_ARM
TDI_ARM
TDO_ARM
ARM_TRACE_CLK
ARM_TRACE_PKTA[0]
ARM_TRACE_PKTA[1]
ARM_TRACE_PKTA[2]
ARM_TRACE_PKTA[3]
ARM_TRACE_PKTB[0]
ARM_TRACE_PKTB[1]
ARM_TRACE_PKTB[2]
ARM_TRACE_PKTB[3]
ARM_TRACE_SYNCA
ARM_TRACE_SYNCB
ARM_PIPESTATA[0]
ARM_PIPESTATA[1]
ARM_PIPESTATA[2]
ARM_PIPESTATB[0]
ARM_PIPESTATB[1]
Case 3 - full debug
debug, are used to
Pin description
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