SPEAR320-2 STMicroelectronics, SPEAR320-2 Datasheet - Page 33

• Manufacturer Part Number: SPEAR320-2
• Description: IC MPU ARM9 289LFBGA
• Manufacturer: STMicroelectronics
• Series: SPEAr®r

Specifications of SPEAR320-2

• Processor Type: ARM Microprocessor
• Speed: 333MHz
• Voltage: 1.14 V ~ 3.6 V
• Mounting Type: Surface Mount
• Package / Case: 289-LFBGA
• Processor Series: SPEAr320
• Core: ARM926EJ-S
• Data Bus Width: 16 bit
• Maximum Clock Frequency: 333 MHz
• Operating Supply Voltage: 1.2 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• Data Ram Size: 8 KB
• Interface Type: I2C, UART, USB, Serial
• Number Of Programmable I/os: 102
• Number Of Timers: 4
• Program Memory Size: 32 KB
• Program Memory Type: ROM
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Features: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant
• Other names: 497-10843

SPEAr320
4.3.3
4.3.4
4.3.5
4.3.6
Printer mode
The “printer” operating mode mainly provides:
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Alternate functions
Other peripheral functions are listed in the Alternate Functions column of
PL_GPIO multiplexing scheme
of a dedicated control register. Refer to the user manual for the register descriptions.
Boot pins
The status of the boot pins is read at startup by the BootROM. Refer to the description of the
Boot register in the SPEAr320 user manual.
GPIOs
The PL_GPIO pins can be used as software controlled general purpose I/Os (GPIOs) if they
are not used by the I/O functions of the SPEAr320 IPs.
To configure any PL_GPIO pin as GPIO, set the corresponding bit in the GPIO_Select(0 ..3)
registers that are 102 bits write registers that select GPIO versus some IPs.
Please refer to the SPEAr320 user manual for more detail about these registers.
Multiplexing scheme
To provide the best I/O multiplexing flexibility and the higher number of GPIOs for ARM
controlled input-output function, the following hierarchical multiplexing scheme has been
implemented.
NAND Flash interface (8 bits, 4 chip selects)
Up to 4 PWM outputs
2 SMII interfaces
3 UARTs
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SDIO interface supporting SPI, SD1, SD4 and SD8 mode
Standard Parallel Port (SPP device implementation)
2 independent SSP Synchronous Serial Ports (SPI, Microwire or TI protocol)
GPIOs with interrupt capabilities
1 with hardware flow control (up to 3 Mbps)
1 with hardware flow control (baud rate up to 7 Mbps)
1 with software flow control (baud rate up to 7 Mbps)
Doc ID 16755 Rev 4
and can be individually enabled/disabled configuring the bits
Table 10:
Pin description
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