AT91SAM7SE256B-AUR Atmel, AT91SAM7SE256B-AUR Datasheet - Page 171

• Manufacturer Part Number: AT91SAM7SE256B-AUR
• Description: IC ARM7 MCU FLASH 256K 128-LQFP
• Manufacturer: Atmel
• Series: AT91SAMr

Specifications of AT91SAM7SE256B-AUR

• Core Processor: ARM7
• Core Size: 16/32-Bit
• Speed: 55MHz
• Connectivity: EBI/EMI, I²C, SPI, SSC, UART/USART, USB
• Peripherals: Brown-out Detect/Reset, POR, PWM, WDT
• Number Of I /o: 88
• Program Memory Size: 256KB (256K x 8)
• Program Memory Type: FLASH
• Ram Size: 32K x 8
• Voltage - Supply (vcc/vdd): 1.65 V ~ 1.95 V
• Data Converters: A/D 8x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: *
• Processor Series: SAM7SE256
• Core: ARM7TDMI
• Data Bus Width: 32 bit
• Data Ram Size: 32 KB
• Interface Type: SPI, USB
• Maximum Clock Frequency: 48 MHz
• Number Of Programmable I/os: 88
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• Operating Temperature Range: - 40 C to + 85 C
• Processor To Be Evaluated: AT91SAM7SE256B
• Supply Current (max): 60 uA
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: Details

Figure 22-14. NWAIT Behavior in Read Access [NWS = 3]
Notes:
Figure 22-15. NWAIT Behavior in Write Access [NWS = 3]
22.6.4.3
6222F–ATARM–14-Jan-11
internally synchronized
internally synchronized
1. Early Read Protocol
2. Standard Read Protocol
Data Float Wait States
NWAIT
NWAIT
D[15:0]
A[22:0]
NWE
MCK
A[22:0]
NWAIT
NWAIT
MCK
NRD
NCS
Some memory devices are slow to release the external bus. For such devices, it is necessary to
add wait states (data float wait states) after a read access before starting a write access or a
read access to a different external memory.
The Data Float Output Time (t
field of the SMC_CSR register for the corresponding chip select
on page
Wait Delay from NRD
(1)
Wait Delay
from NWE
196). The value of TDF indicates the number of data float wait cycles (between 0 and
(2)
Synchronization Delay
Synchronization Delay
NWAIT
NWAIT
DF
) for each external memory device is programmed in the TDF
SAM7SE512/256/32 Preliminary
(“SMC Chip Select Registers”
171