AT91SAM7SE256B-AUR Atmel, AT91SAM7SE256B-AUR Datasheet - Page 120

• Manufacturer Part Number: AT91SAM7SE256B-AUR
• Description: IC ARM7 MCU FLASH 256K 128-LQFP
• Manufacturer: Atmel
• Series: AT91SAMr

Specifications of AT91SAM7SE256B-AUR

• Core Processor: ARM7
• Core Size: 16/32-Bit
• Speed: 55MHz
• Connectivity: EBI/EMI, I²C, SPI, SSC, UART/USART, USB
• Peripherals: Brown-out Detect/Reset, POR, PWM, WDT
• Number Of I /o: 88
• Program Memory Size: 256KB (256K x 8)
• Program Memory Type: FLASH
• Ram Size: 32K x 8
• Voltage - Supply (vcc/vdd): 1.65 V ~ 1.95 V
• Data Converters: A/D 8x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: *
• Processor Series: SAM7SE256
• Core: ARM7TDMI
• Data Bus Width: 32 bit
• Data Ram Size: 32 KB
• Interface Type: SPI, USB
• Maximum Clock Frequency: 48 MHz
• Number Of Programmable I/os: 88
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• Operating Temperature Range: - 40 C to + 85 C
• Processor To Be Evaluated: AT91SAM7SE256B
• Supply Current (max): 60 uA
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: Details

20.2.3
20.2.4
120
SAM7SE512/256/32 Preliminary
Entering Programming Mode
Programmer Handshaking
When MODE is equal to CMDE, then a new command (strobed on DATA[15:0] signals) is stored
in the command register.
Table 20-3.
Note:
The following algorithm puts the device in Parallel Programming Mode:
Note:
An handshake is defined for read and write operations. When the device is ready to start a new
operation (RDY signal set), the programmer starts the handshake by clearing the NCMD signal.
The handshaking is achieved once NCMD signal is high and RDY is high.
DATA[15:0]
0x0011
0x0012
0x0022
0x0032
0x0042
0x0013
0x0014
0x0024
0x0015
0x0034
0x0044
0x0025
0x0054
0x0035
0x001F
0x0016
0x001E
• Apply GND, VDDIO, VDDCORE, VDDFLASH and VDDPLL.
• Apply XIN clock within T
• Wait for T
• Start a read or write handshaking.
1. Applies to SAM7SE512.
After reset, the device is clocked by the internal RC oscillator. Before clearing RDY signal, if an
external clock (> 32 kHz) is connected to XIN, then the device switches on the external clock.
Else, XIN input is not considered. A higher frequency on XIN speeds up the programmer
handshake.
POR_RESET
Command Bit Coding
Symbol
READ
WP
WPL
EWP
EWPL
EA
SLB
CLB
GLB
SFB
CFB
GFB
SSE
GSE
WRAM
SEFC
GVE
POR_RESET
if an external clock is available.
Command Executed
Read Flash
Write Page Flash
Write Page and Lock Flash
Erase Page and Write Page
Erase Page and Write Page then Lock
Erase All
Set Lock Bit
Clear Lock Bit
Get Lock Bit
Set General Purpose NVM bit
Clear General Purpose NVM bit
Get General Purpose NVM bit
Set Security Bit
Get Security Bit
Write Memory
Select EFC Controller
Get Version
(1)
6222F–ATARM–14-Jan-11