AT91SAM7SE256B-AUR Atmel, AT91SAM7SE256B-AUR Datasheet - Page 110

• Manufacturer Part Number: AT91SAM7SE256B-AUR
• Description: IC ARM7 MCU FLASH 256K 128-LQFP
• Manufacturer: Atmel
• Series: AT91SAMr

Specifications of AT91SAM7SE256B-AUR

• Core Processor: ARM7
• Core Size: 16/32-Bit
• Speed: 55MHz
• Connectivity: EBI/EMI, I²C, SPI, SSC, UART/USART, USB
• Peripherals: Brown-out Detect/Reset, POR, PWM, WDT
• Number Of I /o: 88
• Program Memory Size: 256KB (256K x 8)
• Program Memory Type: FLASH
• Ram Size: 32K x 8
• Voltage - Supply (vcc/vdd): 1.65 V ~ 1.95 V
• Data Converters: A/D 8x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: *
• Processor Series: SAM7SE256
• Core: ARM7TDMI
• Data Bus Width: 32 bit
• Data Ram Size: 32 KB
• Interface Type: SPI, USB
• Maximum Clock Frequency: 48 MHz
• Number Of Programmable I/os: 88
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• Operating Temperature Range: - 40 C to + 85 C
• Processor To Be Evaluated: AT91SAM7SE256B
• Supply Current (max): 60 uA
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: Details

19.3
Table 19-2.
Table 19-3.
110
Offset
0x60
0x64
0x68
0x6C
Offset
0x70
0x74
0x78
0x7C
Embedded Flash Controller (EFC ) User Interface
SAM7SE512/256/32 Preliminary
Embedded Flash Controller (EFC0) Register Mapping
Embedded Flash Controller (EFC1) Register Mapping
Register
MC Flash Mode Register
MC Flash Command Register
MC Flash Status Register
Reserved
Register
MC Flash Mode Register
MC Flash Command Register
MC Flash Status Register
Reserved
When the security bit is active, the SECURITY bit in the MC_FSR is set.
The User Interface of the EFC is integrated within the Memory Controller with Base Address:
0xFFFF FF00.
The SAM7SE512 is equipped with two EFCs, EFC0 and EFC1, as described in the Register
Mapping tables and Register descriptions that follow.
The SAM7SE256/32 is equipped with one EFC (EFC0).
• When the locking completes, the bit FRDY in the Flash Programming Status Register
(MC_FSR) rises. If an interrupt has been enabled by setting the bit FRDY in MC_FMR, the
interrupt line of the Memory Controller is activated.
MC_FMR
MC_FMR
MC_FCR
MC_FCR
MC_FSR
MC_FSR
Name
Name
–
–
Read/Write
Read/Write
Write-only
Read-only
Write-only
Read-only
Access
Access
–
–
6222F–ATARM–14-Jan-11
Reset State
Reset State
0x0
0x0
–
–
–
–
–
–