MC711P2CFNE3 Freescale Semiconductor, MC711P2CFNE3 Datasheet - Page 96

• Manufacturer Part Number: MC711P2CFNE3
• Description: IC MCU 8BIT 84-PLCC
• Manufacturer: Freescale Semiconductor
• Series: HC11r

Specifications of MC711P2CFNE3

• Core Processor: HC11
• Core Size: 8-Bit
• Speed: 3MHz
• Connectivity: MI Bus, SCI, SPI
• Peripherals: POR, PWM, WDT
• Number Of I /o: 50
• Program Memory Size: 32KB (32K x 8)
• Program Memory Type: OTP
• Eeprom Size: 640 x 8
• Ram Size: 1K x 8
• Voltage - Supply (vcc/vdd): 4.5 V ~ 5.5 V
• Data Converters: A/D 8x8b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 84-PLCC
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

Serial Communications Interface (SCI)
Technical Data
M — Mode (select character format)
WAKE — Wakeup by address mark/idle
ILT — Idle line type
PE — Parity enable
PT — Parity type
Freescale Semiconductor, Inc.
This bit determines which of two types of idle line detection method is
used by the SCI receiver. In short mode the stop bit and any bits that
were ones before the stop bit will be considered as part of that string
of ones, possibly resulting in erroneous or premature detection of an
idle line condition. In long mode the SCI system does not begin
counting ones until a stop bit is received.
For More Information On This Product,
1 = Start bit, 9 data bits, 1 stop bit.
0 = Start bit, 8 data bits, 1 stop bit.
1 = Wakeup by address mark (most significant data bit set).
0 = Wakeup by IDLE line recognition.
1 = Long (SCI counts ones only after stop bit).
0 = Short (SCI counts consecutive ones after start bit).
1 = Parity enabled.
0 = Parity disabled.
1 = Parity odd (an odd number of ones causes parity bit to be zero,
0 = Parity even (an even number of ones causes parity bit to be
Serial Communications Interface (SCI)
an even number of ones causes parity bit to be one).
zero, an odd number of ones causes parity bit to be one).
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MC68HC11P2 — Rev 1.0