MC711P2CFNE3 Freescale Semiconductor, MC711P2CFNE3 Datasheet - Page 177

• Manufacturer Part Number: MC711P2CFNE3
• Description: IC MCU 8BIT 84-PLCC
• Manufacturer: Freescale Semiconductor
• Series: HC11r

Specifications of MC711P2CFNE3

• Core Processor: HC11
• Core Size: 8-Bit
• Speed: 3MHz
• Connectivity: MI Bus, SCI, SPI
• Peripherals: POR, PWM, WDT
• Number Of I /o: 50
• Program Memory Size: 32KB (32K x 8)
• Program Memory Type: OTP
• Eeprom Size: 640 x 8
• Ram Size: 1K x 8
• Voltage - Supply (vcc/vdd): 4.5 V ~ 5.5 V
• Data Converters: A/D 8x8b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 84-PLCC
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

9.3.5 A/D converter clocks
9.3.6 Conversion sequence
9.3.7 Conversion process
MC68HC11P2 — Rev 1.0
The CSEL bit in the OPTION register selects whether the A/D converter
uses the system E clock or an internal RC oscillator for synchronization.
When E clock frequency is below 750kHz, charge leakage in the
capacitor array can cause errors, and the internal oscillator should be
used. When the RC clock is used, additional errors can occur because
the comparator is sensitive to the additional system clock noise.
A/D converter operations are performed in sequences of four
conversions each. A conversion sequence can repeat continuously or
stop after one iteration. The conversion complete flag (CCF) is set after
the fourth conversion in a sequence to show the availability of data in the
result registers.
Synchronization is referenced to the system E clock.
The A/D conversion sequence begins one E clock cycle after a write to
the A/D control/status register, ADCTL. The bits in ADCTL select the
E clock
Freescale Semiconductor, Inc.
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0
Analog-to-Digital Converter
Go to: www.freescale.com
update ADR1
Convert first
channel and
Sample analog input
Figure 9-3. A/D conversion sequence
Figure 9-3
12 cycles
32
Convert second
update ADR2
channel and
shows the timing of a typical sequence.
4 cycles
MSB
Successive approximation sequence
64
2 cyc 2 cyc 2 cyc 2 cyc 2 cyc 2 cyc 2 cyc 2 cyc
bit 6 bit 5 bit 4 bit 3 bit 2 bit 1 bit 0
update ADR3
Convert third
channel and
96
Analog-to-Digital Converter
Convert fourth
update ADR4
channel and
Technical Data
END
128 E clock cycles
Overview