MC711P2CFNE3 Freescale Semiconductor, MC711P2CFNE3 Datasheet - Page 192

• Manufacturer Part Number: MC711P2CFNE3
• Description: IC MCU 8BIT 84-PLCC
• Manufacturer: Freescale Semiconductor
• Series: HC11r

Specifications of MC711P2CFNE3

• Core Processor: HC11
• Core Size: 8-Bit
• Speed: 3MHz
• Connectivity: MI Bus, SCI, SPI
• Peripherals: POR, PWM, WDT
• Number Of I /o: 50
• Program Memory Size: 32KB (32K x 8)
• Program Memory Type: OTP
• Eeprom Size: 640 x 8
• Ram Size: 1K x 8
• Voltage - Supply (vcc/vdd): 4.5 V ~ 5.5 V
• Data Converters: A/D 8x8b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 84-PLCC
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

Resets and Interrupts
10.4 Effects of reset
10.4.1 Central processing unit
10.4.2 Memory map
Technical Data
When a reset condition is recognized, the internal registers and control
bits are forced to an initial state. Depending on the cause of the reset and
the operating mode, the reset vector can be fetched from any of six
possible locations, as shown in
These initial states then control on-chip peripheral systems to force them
to known start-up states, as described in the following paragraphs.
After reset, the CPU fetches the restart vector from the appropriate
address during the first three cycles, and begins executing instructions.
The stack pointer and other CPU registers are indeterminate
immediately after reset; however, the X and I interrupt mask bits in the
condition code register (CCR) are set to mask any interrupt requests.
Also, the S-bit in the CCR is set to inhibit the STOP mode.
After reset, the INIT register is initialized to $00, putting the 1024 bytes
of RAM at locations $0080 –$047F, and the control registers at locations
$0000–$007F. The INIT2 register puts EEPROM at locations
$0D80–$0FFF.
Freescale Semiconductor, Inc.
POR or RESET pin
Clock monitor failure
COP watchdog timeout
Table 10-2. Reset cause, reset vector and operating mode
For More Information On This Product,
Cause of reset
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Resets and Interrupts
Normal mode vector
$FFFC, $FFFD
$FFFE, $FFFF
$FFFA, $FFFB
Table
10-2.
Special test or bootstrap
MC68HC11P2 — Rev 1.0
$BFFC, $BFFD
$BFFE, $BFFF
$BFFA, $BFFB