MC711P2CFNE3 Freescale Semiconductor, MC711P2CFNE3 Datasheet - Page 63

• Manufacturer Part Number: MC711P2CFNE3
• Description: IC MCU 8BIT 84-PLCC
• Manufacturer: Freescale Semiconductor
• Series: HC11r

Specifications of MC711P2CFNE3

• Core Processor: HC11
• Core Size: 8-Bit
• Speed: 3MHz
• Connectivity: MI Bus, SCI, SPI
• Peripherals: POR, PWM, WDT
• Number Of I /o: 50
• Program Memory Size: 32KB (32K x 8)
• Program Memory Type: OTP
• Eeprom Size: 640 x 8
• Ram Size: 1K x 8
• Voltage - Supply (vcc/vdd): 4.5 V ~ 5.5 V
• Data Converters: A/D 8x8b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 84-PLCC
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

3.5.2.7 TMSK2 — Timer interrupt mask register 2
MC68HC11P2 — Rev 1.0
Timer interrupt mask 2 (TMSK2) $0024
NOTE:
PR[1:0] are time-protected control bits and can be changed only once
and then only within the first 64 bus cycles after reset in normal modes.
Bits in TMSK2 correspond bit for bit with flag bits in TFLG2. Ones in
TMSK2 enable the corresponding interrupt sources.
TOI — Timer overflow interrupt enable
RTII — Real-time interrupt enable
PAOVI — Pulse accumulator overflow interrupt enable (Refer to
System)
PAII — Pulse accumulator interrupt enable (Refer to
PR[1:0] — Timer prescaler select
Freescale Semiconductor, Inc.
These two bits select the prescale rate for the main 16-bit free-running
timer system. These bits can be written only once during the first 64
E clock cycles after reset in normal modes, or at any time in special
modes. Refer to the following table:
Address bit 7
For More Information On This Product,
1 = Interrupt requested when TOF is set.
0 = TOF interrupts disabled.
1 = Interrupt requested when RTIF set.
0 = RTIF interrupts disabled.
1 = Interrupt requested when PAOVF set.
0 = PAOVF interrupts disabled.
1 = Interrupt requested when PAIF set.
0 = PAIF interrupts disabled.
Operating Modes and On-Chip Memory
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TOI
bit 6
RTII PAOVI PAII
PR[1:0]
bit 5
0 0
0 1
1 0
bit 4
Prescale
Operating Modes and On-Chip Memory
bit 3
factor
0
1
4
8
bit 2
0
bit 1
PR1
Timing
System initialization
bit 0
PR0 0000 0000
Technical Data
System)
Timing
on reset
State