HD64F2134FA20 Renesas Electronics America, HD64F2134FA20 Datasheet - Page 748

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HD64F2134FA20

Manufacturer Part Number
HD64F2134FA20
Description
IC H8S MCU FLASH 128K 80QFP
Manufacturer
Renesas Electronics America
Series
H8® H8S/2100r
Datasheets

Specifications of HD64F2134FA20

Core Processor
H8S/2000
Core Size
16-Bit
Speed
20MHz
Connectivity
IrDA, SCI
Peripherals
POR, PWM, WDT
Number Of I /o
58
Program Memory Size
128KB (128K x 8)
Program Memory Type
FLASH
Ram Size
4K x 8
Voltage - Supply (vcc/vdd)
4 V ~ 5.5 V
Data Converters
A/D 8x10b; D/A 2x8b
Oscillator Type
Internal
Operating Temperature
-20°C ~ 75°C
Package / Case
80-QFP
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Eeprom Size
-

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Part Number
Manufacturer
Quantity
Price
Part Number:
HD64F2134FA20
Manufacturer:
Renesas Electronics America
Quantity:
10 000
Part Number:
HD64F2134FA20V
Manufacturer:
RENESAS
Quantity:
201
Section 24 Power-Down State
24.4
24.4.1
If a SLEEP instruction is executed when the SSBY bit in SBYCR and the LSON bit in LPWRCR
are both cleared to 0, the CPU enters sleep mode. In sleep mode, CPU operation stops but the
contents of the CPU’s internal registers are retained. Other supporting modules do not stop.
24.4.2
Sleep mode is cleared by any interrupt, or with the RES pin or STBY pin.
Clearing with an Interrupt: When an interrupt request signal is input, sleep mode is cleared and
interrupt exception handling is started. Sleep mode will not be cleared if interrupts are disabled, or
if interrupts other than NMI have been masked by the CPU.
Clearing with the RES
RES pin is driven high after the prescribed reset input period, the CPU begins reset exception
handling.
Clearing with the STBY
standby mode.
Rev. 4.00 Jun 06, 2006 page 692 of 1004
REJ09B0301-0400
supporting module
clock
Bus master clock
Internal address
bus
Internal write signal
,
Sleep Mode
Sleep Mode
Clearing Sleep Mode
Figure 24.2 Medium-Speed Mode Transition and Clearance Timing
RES
RES
RES Pin: When the RES pin is driven low, the reset state is entered. When the
STBY
STBY
STBY Pin: When the STBY pin is driven low, a transition is made to hardware
SBYCR
Medium-speed mode
SBYCR

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