HD64F2134FA20 Renesas Electronics America, HD64F2134FA20 Datasheet - Page 556

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HD64F2134FA20

Manufacturer Part Number
HD64F2134FA20
Description
IC H8S MCU FLASH 128K 80QFP
Manufacturer
Renesas Electronics America
Series
H8® H8S/2100r
Datasheets

Specifications of HD64F2134FA20

Core Processor
H8S/2000
Core Size
16-Bit
Speed
20MHz
Connectivity
IrDA, SCI
Peripherals
POR, PWM, WDT
Number Of I /o
58
Program Memory Size
128KB (128K x 8)
Program Memory Type
FLASH
Ram Size
4K x 8
Voltage - Supply (vcc/vdd)
4 V ~ 5.5 V
Data Converters
A/D 8x10b; D/A 2x8b
Oscillator Type
Internal
Operating Temperature
-20°C ~ 75°C
Package / Case
80-QFP
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Eeprom Size
-

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Part Number:
HD64F2134FA20
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Renesas Electronics America
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Manufacturer:
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Section 16 I
16.3.9
The logic levels at the SCL and SDA pins are routed through noise cancelers before being latched
internally. Figure 16.13 shows a block diagram of the noise canceler circuit.
The noise canceler consists of two cascaded latches and a match detector. The SCL (or SDA)
input signal is sampled on the system clock, but is not passed forward to the next circuit unless the
outputs of both latches agree. If they do not agree, the previous value is held.
16.3.10 Sample Flowcharts
Figures 16.14 to 16.17 show sample flowcharts for using the I
Rev. 4.00 Jun 06, 2006 page 500 of 1004
REJ09B0301-0400
SCL or
SDA input
signal
Sampling
clock
Noise Canceler
2
C Bus Interface [H8S/2138 Group Option]
D
Sampling clock
System clock
period
Latch
Figure 16.13 Block Diagram of Noise Canceler
C
Q
D
Latch
C
Q
2
C bus interface in each mode.
detector
Match
Internal
SCL or
SDA
signal

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