HD64F2134FA20 Renesas Electronics America, HD64F2134FA20 Datasheet - Page 312

no-image

HD64F2134FA20

Manufacturer Part Number
HD64F2134FA20
Description
IC H8S MCU FLASH 128K 80QFP
Manufacturer
Renesas Electronics America
Series
H8® H8S/2100r
Datasheets

Specifications of HD64F2134FA20

Core Processor
H8S/2000
Core Size
16-Bit
Speed
20MHz
Connectivity
IrDA, SCI
Peripherals
POR, PWM, WDT
Number Of I /o
58
Program Memory Size
128KB (128K x 8)
Program Memory Type
FLASH
Ram Size
4K x 8
Voltage - Supply (vcc/vdd)
4 V ~ 5.5 V
Data Converters
A/D 8x10b; D/A 2x8b
Oscillator Type
Internal
Operating Temperature
-20°C ~ 75°C
Package / Case
80-QFP
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Eeprom Size
-

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
HD64F2134FA20
Manufacturer:
Renesas Electronics America
Quantity:
10 000
Part Number:
HD64F2134FA20V
Manufacturer:
RENESAS
Quantity:
201
Section 10 14-Bit PWM D/A
10.2
10.2.1
DACNT is a 14-bit readable/writable up-counter that increments on an input clock pulse. The
input clock is selected by the clock select bit (CKS) in DACR. The CPU can read and write the
DACNT value, but since DACNT is a 16-bit register, data transfers between it and the CPU are
performed using a temporary register (TEMP). See section 10.3, Bus Master Interface, for details.
DACNT functions as the time base for both PWM D/A channels. When a channel operates with
14-bit precision, it uses all DACNT bits. When a channel operates with 12-bit precision, it uses the
lower 12 (counter) bits and ignores the upper two (counter) bits.
DACNT is initialized to H'0003 by a reset, in the standby modes, watch mode, subactive mode,
subsleep mode, and module stop mode, and by the PWME bit.
Bit 1 of DACNTL (CPU) is not used, and is always read as 1.
DACNTL Bit 0—Register Select (REGS): DADRA and DACR, and DADRB and DACNT, are
located at the same addresses. The REGS bit specifies which registers can be accessed. The REGS
bit can be accessed regardless of whether DADRB or DACNT is selected.
Bit 0
REGS
0
1
Rev. 4.00 Jun 06, 2006 page 256 of 1004
REJ09B0301-0400
Bit (CPU)
BIT (Counter)
Initial value
Read/Write
Register Descriptions
PWM D/A Counter (DACNT)
Description
DADRA and DADRB can be accessed
DACR and DACNT can be accessed
R/W
15
7
0
R/W
14
6
0
R/W
13
5
0
DACNTH
R/W
12
4
0
R/W
11
3
0
R/W
10
2
0
R/W
9
1
0
R/W
8
0
0
R/W
7
8
0
R/W
6
9
0
R/W
10
5
0
DACNTL
R/W
11
4
0
R/W
12
3
0
R/W
13
2
0
(Initial value)
1
1
REGS
R/W
0
1

Related parts for HD64F2134FA20