MC908AZ60ACFU Freescale Semiconductor, MC908AZ60ACFU Datasheet - Page 410
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MC908AZ60ACFU
Manufacturer Part Number
MC908AZ60ACFU
Description
IC MCU FLASH 8.4MHZ 60K 64QFP
Manufacturer
Freescale Semiconductor
Series
HC08r
Datasheet
1.MC908AZ60ACFUER.pdf
(414 pages)
Specifications of MC908AZ60ACFU
Core Processor
HC08
Core Size
8-Bit
Speed
8.4MHz
Connectivity
CAN, SCI, SPI
Peripherals
LVD, POR, PWM
Number Of I /o
52
Program Memory Size
60KB (60K x 8)
Program Memory Type
FLASH
Eeprom Size
1K x 8
Ram Size
2K x 8
Voltage - Supply (vcc/vdd)
4.5 V ~ 5.5 V
Data Converters
A/D 15x8b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
64-QFP
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
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Glossary
parity — An error-checking scheme that counts the number of logic 1s in each byte transmitted. In a
PC — See “program counter (PC).”
peripheral — A circuit not under direct CPU control.
phase-locked loop (PLL) — A oscillator circuit in which the frequency of the oscillator is synchronized
PLL — See "phase-locked loop (PLL)."
pointer — Pointer register. An index register is sometimes called a pointer register because its contents
polarity — The two opposite logic levels, logic 1 and logic 0, which correspond to two different voltage
polling — Periodically reading a status bit to monitor the condition of a peripheral device.
port — A set of wires for communicating with off-chip devices.
prescaler — A circuit that generates an output signal related to the input signal by a fractional scale factor
program — A set of computer instructions that cause a computer to perform a desired operation or
program counter (PC) — A 16-bit register in the CPU08. The PC register holds the address of the next
pull — An instruction that copies into the accumulator the contents of a stack RAM location. The stack
pullup — A transistor in the output of a logic gate that connects the output to the logic 1 voltage of the
pulse-width — The amount of time a signal is on as opposed to being in its off state.
pulse-width modulation (PWM) — Controlled variation (modulation) of the pulse width of a signal with
push — An instruction that copies the contents of the accumulator to the stack RAM. The stack RAM
PWM period — The time required for one complete cycle of a PWM waveform.
RAM — Random access memory. All RAM locations can be read or written by the CPU. The contents of
RC circuit — A circuit consisting of capacitors and resistors having a defined time constant.
read — To copy the contents of a memory location to the accumulator.
register — A circuit that stores a group of bits.
410
system that uses odd parity, every byte is expected to have an odd number of logic 1s. In an even
parity system, every byte should have an even number of logic 1s. In the transmitter, a parity
generator appends an extra bit to each byte to make the number of logic 1s odd for odd parity or even
for even parity. A parity checker in the receiver counts the number of logic 1s in each byte. The parity
checker generates an error signal if it finds a byte with an incorrect number of logic 1s.
to a reference signal.
are used in the calculation of the address of an operand, and therefore points to the operand.
levels, V
such as 1/2, 1/8, 1/10 etc.
operations.
instruction or operand that the CPU will use.
RAM address is in the stack pointer.
power supply.
a constant frequency.
address is in the stack pointer.
a RAM memory location remain valid until the CPU writes a different value or until power is turned off.
DD
and V
MC68HC908AZ60A • MC68HC908AS60A • MC68HC908AS60E Data Sheet, Rev. 6
SS
.
Freescale Semiconductor
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