MC908AZ60ACFU Freescale Semiconductor, MC908AZ60ACFU Datasheet - Page 294
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MC908AZ60ACFU
Manufacturer Part Number
MC908AZ60ACFU
Description
IC MCU FLASH 8.4MHZ 60K 64QFP
Manufacturer
Freescale Semiconductor
Series
HC08r
Datasheet
1.MC908AZ60ACFUER.pdf
(414 pages)
Specifications of MC908AZ60ACFU
Core Processor
HC08
Core Size
8-Bit
Speed
8.4MHz
Connectivity
CAN, SCI, SPI
Peripherals
LVD, POR, PWM
Number Of I /o
52
Program Memory Size
60KB (60K x 8)
Program Memory Type
FLASH
Eeprom Size
1K x 8
Ram Size
2K x 8
Voltage - Supply (vcc/vdd)
4.5 V ~ 5.5 V
Data Converters
A/D 15x8b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
64-QFP
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
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MSCAN Controller (MSCAN08)
23.13.7 MSCAN08 Transmitter Flag Register
The Abort Acknowledge flags are read only. The Transmitter Buffer Empty flags are read and clear only.
A flag can be cleared by writing a 1 to the corresponding bit position. Writing a 0 has no effect on the flag
setting. The Transmitter Buffer Empty flags each have an associated interrupt enable bit in the CTCR
register. A hard or soft reset will resets the register.
ABTAK2–ABTAK0 — Abort Acknowledge
TXE2–TXE0 — Transmitter Empty
294
This flag acknowledges that a message has been aborted due to a pending abort request from the
CPU. After a particular message buffer has been flagged empty, this flag can be used by the
application software to identify whether the message has been aborted successfully or has been sent.
The ABTAKx flag is cleared implicitly whenever the corresponding TXE flag is cleared.
This flag indicates that the associated transmit message buffer is empty, thus not scheduled for
transmission. The CPU must handshake (clear) the flag after a message has been set up in the
transmit buffer and is due for transmission. The MSCAN08 sets the flag after the message has been
sent successfully. The flag is also set by the MSCAN08 when the transmission request was
successfully aborted due to a pending abort request (see
If not masked, a receive interrupt is pending while this flag is set.
Clearing a TXEx flag also clears the corresponding ABTAKx flag (ABTAK, see above). When a TXEx
flag is set, the corresponding ABTRQx bit (ABTRQ, see
Register) is cleared.
1 = The message has been aborted.
0 = The message has not been aborted, thus has been sent out.
1 = The associated message buffer is empty (not scheduled).
0 = The associated message buffer is full (loaded with a message due for transmission).
Address:
To ensure data integrity, no registers of the transmit buffers should be
written to while the associated TXE flag is cleared.
The CTFLG register is held in the reset state when the SFTRES bit in
CMCR0 is set.
Reset:
Read:
Write:
MC68HC908AZ60A • MC68HC908AS60A • MC68HC908AS60E Data Sheet, Rev. 6
$0506
Bit 7
0
0
Figure 23-21. Transmitter Flag Register (CTFLG)
= Unimplemented
ABTAK2
5
6
0
ABTAK1
5
0
NOTE
NOTE
ABTAK0
4
0
23.13.8 MSCAN08 Transmitter Control
3
0
0
23.12.5 Transmit Buffer Priority
TXE2
2
1
TXE1
1
1
Freescale Semiconductor
TXE0
Bit 0
1
Registers).
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