AT91SAM9261-CJ-999 Atmel, AT91SAM9261-CJ-999 Datasheet - Page 734

• Manufacturer Part Number: AT91SAM9261-CJ-999
• Description: IC MCU ARM9 ULTRA LP 217LFBGA
• Manufacturer: Atmel
• Series: AT91SAMr

Specifications of AT91SAM9261-CJ-999

• Core Processor: ARM9
• Core Size: 16/32-Bit
• Speed: 190MHz
• Connectivity: EBI/EMI, I²C, MMC, SPI, SSC, UART/USART, USB
• Peripherals: DMA, LCD, POR, PWM, WDT
• Number Of I /o: 96
• Program Memory Size: 32KB (32K x 8)
• Program Memory Type: ROM
• Ram Size: 192K x 8
• Voltage - Supply (vcc/vdd): 1.08 V ~ 1.32 V
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 217-LFBGA
• For Use With: AT91SAM9261-EK - KIT EVAL FOR AT91SAM926EJ-SAT91SAM-ICE - EMULATOR FOR AT91 ARM7/ARM9
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Data Converters: -

734
Doc. Rev.
6062D
AT91SAM9261 Preliminary
Date
14-Apr-06
Comments (Continued)
Electrical Characteristics:
New
Deleted table Master Clock Characteristics,
New data for t
New data in
C
New
New data on pull-ups in
page
Deleted section “Applicable Conditions and Derating Data” and figures “Derating Curve for
Different Operating Temperatures”, “Derating Curve for Different Core Supply Voltages” and
“ Derating Curve for Different IO Supply Voltages”.
New tables with SMC and SDRAMC timings in
New figures for SMC timings
page 647
page
In
from positive to negative.
Errata: Added:
Section 42.1 “Marking” on page
Section 42.2.3.3 “Boot ROM: Temperature Range” on page 695
Section 42.2.6.2 “MCI: Data Timeout Error Flag” on page 697
Section 42.2.6.3 “MCI: STREAM command not supported” on page 697
Section 42.2.6.4 “MCI: STOP during a WRITE_MULTIPLE_BLOCK command” on page
697 Section 42.2.10.4 “SPI: Chip Select and fixed mode” on page 700
Section 42.2.10.5 “SPI: Baudrate set to 1” on page 701
Section 42.2.10.6 “SPI: Software Reset” on page 701
Section 42.2.15.5 “TWI: Software reset” on page 704
Section 42.2.15.6 “TWI: STOP not generated” on page
Section 42.2.15.2 “USART: RTS unexpected behavior” on page 703
Section 42.2.17.1 “UDP: Bad data in the first IN data stage” on page 704
Section 42.2.14.1 “SYSC: Possible event loss when reading RTT_SR” on page 703
Section 42.2.2.1 “Backup Overconsumption during AHB Masters activity” on page
Removed errata: TWI: Behavior of OVRE bit andTWI: Clock Divider Limitation.
LEXT
Table 38-19, “SDRAMC Signals,” on page
Table 38-5, “Processor Clock Waveform Parameters,” on page
Table 38-9, “Crystal Characteristics,” on page
. New max values for t
642.
648.
and
Table 38-8, “Main Oscillator Characteristics,” on page
ST
Figure 38-4, “SMC Signals for NRD and NWR Controlled Accesses,” on
in
Table 38-7, “32 kHz Oscillator Characteristics,” on page
Table 38-11, “USB Transceiver Electrical Parameters,” on
ST
Figure 38-3, “SMC Signals for NCS Controlled Accesses,” on
.
693.
page
649, some SDRAMx derating values changed
Section 38.7 ”EBI Timings” on page
638.
641.
704,
640, I
638.
DDST
639.
, P
ON
, I
694.
644.
DDON
6062M–ATARM–23-Mar-09
,
Change
Request
Reference
2619