AT91SAM9261-CJ-999 Atmel, AT91SAM9261-CJ-999 Datasheet - Page 63

• Manufacturer Part Number: AT91SAM9261-CJ-999
• Description: IC MCU ARM9 ULTRA LP 217LFBGA
• Manufacturer: Atmel
• Series: AT91SAMr

Specifications of AT91SAM9261-CJ-999

• Core Processor: ARM9
• Core Size: 16/32-Bit
• Speed: 190MHz
• Connectivity: EBI/EMI, I²C, MMC, SPI, SSC, UART/USART, USB
• Peripherals: DMA, LCD, POR, PWM, WDT
• Number Of I /o: 96
• Program Memory Size: 32KB (32K x 8)
• Program Memory Type: ROM
• Ram Size: 192K x 8
• Voltage - Supply (vcc/vdd): 1.08 V ~ 1.32 V
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 217-LFBGA
• For Use With: AT91SAM9261-EK - KIT EVAL FOR AT91SAM926EJ-SAT91SAM-ICE - EMULATOR FOR AT91 ARM7/ARM9
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Data Converters: -

Data Comparator
Memory Decoder Inputs
FIFO
Half-rate Clocking Mode
6062M–ATARM–23-Mar-09
Each full address comparator is associated with a specific data comparator. A data comparator
is used to observe the data bus only when load and store operations occur.
A data comparator has both a value register and a mask register, therefore it is possible to com-
pare only certain bits of a preprogrammed value against the data bus.
The eight memory map decoder inputs are connected to custom address decoders. The
address decoders divide the memory into regions of on-chip SRAM, on-chip ROM, and peripher-
als. The address decoders also optimize the ETM9 trace trigger.
Table 12-2.
A 45-byte FIFO is used to store data tracing. The FIFO is used to separate the pipeline status
from the trace packet, thus the FIFO can be used to buffer trace packets.
A FIFO overflow is detected by the embedded trace macrocell when the FIFO is full or when the
FIFO has fewer bytes than the user-programmed number.
The ETM9 is implemented in half-rate mode that allows both rising and falling edge data tracing
of the trace clock.
The half-rate mode is implemented to maintain the signal clock integrity of high-speed systems
(up to 100 Mhz).
Product Resource
SRAM
SRAM
ROM
ROM
External Bus Interface
External Bus Interface
User Peripherals
System Peripherals
• The resource matches if the address is within the following range:
• Unpredictable behavior occurs if the two address comparators are not configured in the same
way.
– (address > = range start address) AND (address < range end address)
ETM Memory Map Inputs Layout
Area
Internal
Internal
Internal
Internal
External
External
Internal
Internal
Access Type
Data
Fetch
Data
Data
Data
Data
Fetch
Fetch
AT91SAM9261 Preliminary
Start Address
0x0000 0000
0x0000 0000
0x0040 0000
0x0040 0000
0x1000 0000
0x1000 0000
0xF000 0000
0xFFFF C000
End Address
0x002F FFFF
0x002F FFFF
0x004F FFFF
0x004F FFFF
0x8FFF FFFF
0x8FFF FFFF
0xFFFF BFFF
0xFFFF FFFF
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