AT91SAM9261-CJ-999 Atmel, AT91SAM9261-CJ-999 Datasheet - Page 34
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AT91SAM9261-CJ-999
Manufacturer Part Number
AT91SAM9261-CJ-999
Description
IC MCU ARM9 ULTRA LP 217LFBGA
Manufacturer
Atmel
Series
AT91SAMr
Datasheet
1.AT91SAM9261-CJ-999.pdf
(749 pages)
Specifications of AT91SAM9261-CJ-999
Core Processor
ARM9
Core Size
16/32-Bit
Speed
190MHz
Connectivity
EBI/EMI, I²C, MMC, SPI, SSC, UART/USART, USB
Peripherals
DMA, LCD, POR, PWM, WDT
Number Of I /o
96
Program Memory Size
32KB (32K x 8)
Program Memory Type
ROM
Ram Size
192K x 8
Voltage - Supply (vcc/vdd)
1.08 V ~ 1.32 V
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
217-LFBGA
For Use With
AT91SAM9261-EK - KIT EVAL FOR AT91SAM926EJ-SAT91SAM-ICE - EMULATOR FOR AT91 ARM7/ARM9
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Data Converters
-
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10.3.5
10.3.6
10.4
34
External Bus Interface
AT91SAM9261 Preliminary
System Interrupt
External Interrupts
The System Interrupt in Source 1 is the wired-OR of the interrupt signals coming from:
The clock of these peripherals cannot be deactivated and Peripheral ID 1 can only be used
within the Advanced Interrupt Controller.
All external interrupt signals, i.e., the Fast Interrupt signal FIQ or the Interrupt signals IRQ0 to
IRQ2, use a dedicated Peripheral ID. However, there is no clock control associated with these
peripheral IDs.
• the SDRAM Controller
• the Debug Unit
• the Periodic Interval Timer
• the Real-Time Timer
• the Watchdog Timer
• the Reset Controller
• the Power Management Controller
• Integrates two External Memory Controllers:
• Additional logic for NAND Flash and CompactFlash support
• Optimized External Bus
• Configurable Chip Select Assignment Managed by EBI_CSA Register located in the MATRIX
user interface
– Static Memory Controller
– SDRAM Controller
– NAND Flash support: 8-bit as well as 16-bit devices are supported
– CompactFlash support: all modes (Attribute Memory, Common Memory, I/O, True
– 16- or 32-bit Data Bus
– Up to 26-bit Address Bus, up to 64 Mbytes addressable
– Eight Chip Selects, each reserved to one of the eight Memory Areas
– Optimized pin multiplexing to reduce latencies on External Memories
– Static Memory Controller on NCS0
– SDRAM Controller or Static Memory Controller on NCS1
– Static Memory Controller on NCS2
– Static Memory Controller on NCS3, Optional NAND Flash Support
– Static Memory Controller on NCS4 - NCS5, Optional CompactFlash Support
– Static Memory Controller on NCS6 - NCS7
IDE) are supported but the signals -IOIS16 (I/O and True IDE modes) and -ATA SEL
(True IDE mode) are not handled.
6062M–ATARM–23-Mar-09
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