AT91SAM9261-CJ-999 Atmel, AT91SAM9261-CJ-999 Datasheet - Page 552
AT91SAM9261-CJ-999
Manufacturer Part Number
AT91SAM9261-CJ-999
Description
IC MCU ARM9 ULTRA LP 217LFBGA
Manufacturer
Atmel
Series
AT91SAMr
Datasheet
1.AT91SAM9261-CJ-999.pdf
(749 pages)
Specifications of AT91SAM9261-CJ-999
Core Processor
ARM9
Core Size
16/32-Bit
Speed
190MHz
Connectivity
EBI/EMI, I²C, MMC, SPI, SSC, UART/USART, USB
Peripherals
DMA, LCD, POR, PWM, WDT
Number Of I /o
96
Program Memory Size
32KB (32K x 8)
Program Memory Type
ROM
Ram Size
192K x 8
Voltage - Supply (vcc/vdd)
1.08 V ~ 1.32 V
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
217-LFBGA
For Use With
AT91SAM9261-EK - KIT EVAL FOR AT91SAM926EJ-SAT91SAM-ICE - EMULATOR FOR AT91 ARM7/ARM9
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Data Converters
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6062M–ATARM–23-Mar-09
The following flowchart shows how to manage a multiple write block transfer with the PDC (see
Figure
the contents of the Interrupt Mask Register (MCI_IMR).
Figure 35-10. Multiple Write Functional Flow Diagram
Note:
35-10) . Polling or interrupt method can be used to wait for the end of write according to
It is assumed that this command has been correctly sent (see
Configure the PDC channel
MCI_TPR = Data Buffer Address to write
MCI_TCR = BlockLength/4
Send SET_BLOCKLEN command (1)
Send SELECT/DESELECT_CARD
Send WRITE_MULTIPLE_BLOCK
Set the PDCMODE bit
MCI_MR |= PDCMODE
Set the block length
MCI_MR |= (BlockLength << 16)
command (1) to select the card
Send STOP_TRANSMISSION
Read status register MCI_SR
MCI_PTCR = TXTEN
NOTBUSY = 0?
command
command
Poll the bit
RETURN
BLKE = 0?
Poll the bit
AT91SAM9261 Preliminary
No
No
(1)
(1)
Yes
Yes
Figure
35-7).
552
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