PIC16C782/JW Microchip Technology, PIC16C782/JW Datasheet - Page 15

• Manufacturer Part Number: PIC16C782/JW
• Description: IC MCU EPROM 2KX14 COMP 20CDIP
• Manufacturer: Microchip Technology
• Series: PIC® 16Cr

Specifications of PIC16C782/JW

• Core Processor: PIC
• Core Size: 8-Bit
• Speed: 20MHz
• Peripherals: Brown-out Detect/Reset, POR, PWM, WDT
• Number Of I /o: 13
• Program Memory Size: 3.5KB (2K x 14)
• Program Memory Type: EPROM, UV
• Ram Size: 128 x 8
• Voltage - Supply (vcc/vdd): 4 V ~ 5.5 V
• Data Converters: A/D 8x8b; D/A 1x8b
• Oscillator Type: Internal
• Operating Temperature: 0°C ~ 70°C
• Package / Case: 20-CDIP (0.300", 7.62mm) Window
• For Use With: DVA16XP202 - ADAPTER DEVICE PIC16C781/782DM163012 - BOARD DEMO PICDEM FOR 16C781/782AC164028 - MODULE SKT PROMATEII 20SOIC/DIP
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Eeprom Size: -
• Connectivity: -
• Other names: Q1137459

2.2.1
The register file can be accessed either directly, or indi-
rectly, through the File Select Register (FSR).
TABLE 2-1:
Bank 0
00h
01h
02h
03h
04h
05h
06h
07h
08h
09h
0Ah
0Bh
0Ch
0Dh
0Eh
0Fh
10h
11h
12h
13h
14h
15h
16h
17h
18h
19h
1Ah
1Bh
1Ch
1Dh
1Eh
1Fh
Legend:
Note
Address
2001 Microchip Technology Inc.
(2)
(2)
(2)
(2)
(1, 2)
(2)
1:
2:
INDF
TMR0
PCL
STATUS
FSR
PORTA
PORTB
PCLATH
INTCON
PIR1
TMR1L
TMR1H
T1CON
ADRES
ADCON0
x = unknown, u = unchanged, q = value depends on condition, - = unimplemented, read as '0'.
Shaded locations are unimplemented, read as ‘0’.
The upper byte of the program counter is not directly accessible. PCLATH is a holding register for the PC<12:8> whose contents are trans-
ferred to the upper byte of the program counter. See Section 2.9 for more detail.
These registers can be addressed from any bank.
GENERAL PURPOSE REGISTER
FILE
Name
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
PIC16C781/782 SPECIAL FUNCTION REGISTER SUMMARY
Addressing this location uses contents of FSR to address data memory (not a physical register)
Timer0 Module’s Register
Program Counter's (PC) Least Significant Byte
Indirect Data Memory Address Pointer
Unimplemented
Unimplemented
Unimplemented
Unimplemented
Holding register for the Least Significant Byte of the 16-bit TMR1 Register
Holding register for the Most Significant Byte of the 16-bit TMR1 Register
Unimplemented
Unimplemented
Unimplemented
Unimplemented
Unimplemented
Unimplemented
Unimplemented
Unimplemented
Unimplemented
Unimplemented
Unimplemented
Unimplemented
Unimplemented
ADC Result Register
ADCS1
LVDIF
Bit 7
RA7
RB7
IRP
GIE
—
—
TMR1GE T1CKPS1 T1CKPS0 T1OSCEN
ADCS0
PEIE
ADIF
Bit 6
RP1
RA6
RB6
—
CHS2
Bit 5
T0IE
C2IF
RP0
RA5
RB5
—
Write Buffer for the upper 5 bits of the Program Counter
CHS1
INTE
Preliminary
Bit 4
C1IF
RA4
RB4
TO
CHS0
RBIE
Bit 3
RA3
RB3
PD
—
2.2.2
The Special Function Registers are registers used by
the CPU and Peripheral Modules for controlling the
desired operation of the device. These registers are
implemented as static RAM. A list of these registers is
given in Table 2-1.
GO/DONE
T1SYNC
Bit 2
RA2
RB2
T0IF
—
Z
SPECIAL FUNCTION REGISTERS
PIC16C781/782
TMR1CS
CHS3
Bit 1
INTF
RA1
RB1
DC
—
TMR1ON
TMR1IF
ADON
RBIF
Bit 0
RA0
RB0
C
0000 0000
xxxx xxxx
0000 0000
0001 1xxx
xxxx xxxx
xxxx 0000
xxxx 0000
---0 0000
0000 000x
0000 ---0
xxxx xxxx
xxxx xxxx
-000 0000
xxxx xxxx
0000 0000
POR, BOR
Value on:
DS41171A-page 13
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