PIC16C782/JW Microchip Technology, PIC16C782/JW Datasheet - Page 104

IC MCU EPROM 2KX14 COMP 20CDIP

PIC16C782/JW

Manufacturer Part Number
PIC16C782/JW
Description
IC MCU EPROM 2KX14 COMP 20CDIP
Manufacturer
Microchip Technology
Series
PIC® 16Cr

Specifications of PIC16C782/JW

Core Processor
PIC
Core Size
8-Bit
Speed
20MHz
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
13
Program Memory Size
3.5KB (2K x 14)
Program Memory Type
EPROM, UV
Ram Size
128 x 8
Voltage - Supply (vcc/vdd)
4 V ~ 5.5 V
Data Converters
A/D 8x8b; D/A 1x8b
Oscillator Type
Internal
Operating Temperature
0°C ~ 70°C
Package / Case
20-CDIP (0.300", 7.62mm) Window
For Use With
DVA16XP202 - ADAPTER DEVICE PIC16C781/782DM163012 - BOARD DEMO PICDEM FOR 16C781/782AC164028 - MODULE SKT PROMATEII 20SOIC/DIP
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Eeprom Size
-
Connectivity
-
Other names
Q1137459

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
PIC16C782/JW
Manufacturer:
AD
Quantity:
580
PIC16C781/782
13.1.1
In PSM (Pulse Skip Modulation), the PSMC operates
as a fixed duty cycle pulse generator, with its output
gated by the analog feedback (see Figure 13-3). Imme-
diately prior to the initiation of a pulse, the analog feed-
back is sampled. If the comparator output = H, a pulse
is initiated and held active for the programmed duty
FIGURE 13-3:
TABLE 13-3:
Legend: x = Don’t Care
DS41171A-page 102
Beginning of PSM cycle
During Pulse
End of Pulse
SMCCL1
SMCCL0
F
OSC
PULSE SKIP MODULATION (PSM)
C1POL
C2POL
Comparator Module
Time
:1
DC<1:0>
C1
C2
S1
3
PSMC1A OPERATION IN PSM MODE USING C1 COMPARATOR ONLY
S0
:2
2
PSMC MODULE IN SINGLE OUTPUT PSM MODE (SIMPLIFIED BLOCK
DIAGRAM)
:4
PSMC
CLK
1
0 = Inactive
2
:8
0
Controller
4-bit Counter
PSMC
Switch
4
Cycle
New
C1OUT
SMCCS
C2OUT
Max
DC
SC
1 = Active
C1OUT
H
L
x
x
DC = Duty Cycle
New Cycle
Select DC
SC Switch
C1OUT
RB6/C1/
PSMC1A
RB7/C2/
PSMC1B/T1G
EXAMPLE
Preliminary
H = High
ASSUMES S1APOL=0
cycle. If the comparator output = L, no pulse is initiated
and the PSMC waits for the start of the next pulse (see
Table 13-3 and Table 13-4). In this mode, both the fre-
quency and duty cycle of the output pulse are program-
mable. The analog feedback gates the presence or
absence of the pulse on a pulse-by-pulse basis.
Programmed DC
SCEN
L = Low
S1APOL
SMCCS=0
HIGH IMPEDANCE
S
Dominant
R
PSMC1A Output Signal
Set
15/16 Period
Q
Period
No Change
SCEN=1
SMCON=1 SMCOM=0
0
1
V
0
1
DD
N
1
0
2001 Microchip Technology Inc.
PWM/PSM=0
RB6/C1/PSMC1A
RB7/C2/PSMC1B/T1G
HIGH IMPEDANCE

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