UPD78F0533AGB-GAH-AX Renesas Electronics America, UPD78F0533AGB-GAH-AX Datasheet - Page 332
UPD78F0533AGB-GAH-AX
Manufacturer Part Number
UPD78F0533AGB-GAH-AX
Description
MCU 8BIT 64-LQFP
Manufacturer
Renesas Electronics America
Series
78K0/Kx2r
Datasheet
1.UPD78F0500MC-5A4-A.pdf
(982 pages)
Specifications of UPD78F0533AGB-GAH-AX
Core Processor
78K/0
Core Size
8-Bit
Speed
20MHz
Connectivity
3-Wire SIO, I²C, LIN, UART/USART
Peripherals
LVD, POR, PWM, WDT
Number Of I /o
55
Program Memory Size
32KB (32K x 8)
Program Memory Type
FLASH
Ram Size
1K x 8
Voltage - Supply (vcc/vdd)
1.8 V ~ 5.5 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
*
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Available stocks
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Manufacturer
Quantity
Price
Company:
Part Number:
UPD78F0533AGB-GAH-AX
Manufacturer:
RENESAS
Quantity:
460
Company:
Part Number:
UPD78F0533AGB-GAH-AX
Manufacturer:
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Quantity:
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78K0/Kx2
(2) Measuring the pulse width by using one input signal of the TI00n pin (free-running timer mode)
R01UH0008EJ0401 Rev.4.01
Jul 15, 2010
Set the free-running timer mode (TMC0n3 and TMC0n2 = 01). The count value of TM0n is captured to CR00n in the
phase reverse to the valid edge detected on the TI00n pin. When the valid edge of the TI00n pin is detected, the
count value of TM0n is captured to CR01n.
By this measurement method, values are stored in separate capture registers when a width from one edge to another
is measured. Therefore, the capture values do not have to be saved. By subtracting the value of one capture register
from that of another, a high-level width, low-level width, and cycle are calculated.
If an overflow occurs, the value becomes negative if one captured value is simply subtracted from another and,
therefore, a borrow occurs (bit 0 (CY) of the program status word (PSW) is set to 1). If this happens, ignore CY and
take the calculated value as the pulse width. In addition, clear bit 0 (OVF0n) of 16-bit timer mode control register 0n
(TMC0n) to 0.
Remark n = 0:
Capture trigger input
Capture trigger input
(TMC0n3, TMC0n2)
Capture interrupt
Capture interrupt
Capture register
Capture register
TM0n register
Operable bits
Overflow flag
(INTTM01n)
(INTTM00n)
n = 0, 1: 78K0/KE2 products whose flash memory is at least 48 KB, and 78K0/KF2 products
(CR00n)
(CR01n)
(OVF0n)
(TI00n)
(TI01n)
FFFFH
0000H
78K0/KE2 products whose flash memory is less than 32 KB, and 78K0/KB2, 78K0/KC2,
78K0/KD2 products
0000H
L
L
Figure 7-54. Timing Example of Pulse Width Measurement (2)
00
0000H
A
• TMC0n = 04H, PRM0n = 10H, CRC0n = 07H
01
M
A
CHAPTER 7 16-BIT TIMER/EVENT COUNTERS 00 AND 01
B
M
0 write clear
N
B
N
C
0 write clear
S
C
D
S
0 write clear
P
D
P
E
0 write clear
Q
E
Q
332
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