UPD78F0533AGB-GAH-AX Renesas Electronics America, UPD78F0533AGB-GAH-AX Datasheet - Page 331
UPD78F0533AGB-GAH-AX
Manufacturer Part Number
UPD78F0533AGB-GAH-AX
Description
MCU 8BIT 64-LQFP
Manufacturer
Renesas Electronics America
Series
78K0/Kx2r
Datasheet
1.UPD78F0500MC-5A4-A.pdf
(982 pages)
Specifications of UPD78F0533AGB-GAH-AX
Core Processor
78K/0
Core Size
8-Bit
Speed
20MHz
Connectivity
3-Wire SIO, I²C, LIN, UART/USART
Peripherals
LVD, POR, PWM, WDT
Number Of I /o
55
Program Memory Size
32KB (32K x 8)
Program Memory Type
FLASH
Ram Size
1K x 8
Voltage - Supply (vcc/vdd)
1.8 V ~ 5.5 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
*
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
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78K0/Kx2
(1) Measuring the pulse width by using two input signals of the TI00n and TI01n pins (free-running timer mode)
R01UH0008EJ0401 Rev.4.01
Jul 15, 2010
A pulse width can be measured in the following three ways.
• Measuring the pulse width by using two input signals of the TI00n and TI01n pins (free-running timer mode)
• Measuring the pulse width by using one input signal of the TI00n pin (free-running timer mode)
• Measuring the pulse width by using one input signal of the TI00n pin (clear & start mode entered by the TI00n pin
Remarks 1. For the setting of the I/O pins, see 7.3 (5) Port mode register 0 (PM0).
Remark n = 0:
Set the free-running timer mode (TMC0n3 and TMC0n2 = 01). When the valid edge of the TI00n pin is detected, the
count value of TM0n is captured to CR01n. When the valid edge of the TI01n pin is detected, the count value of
TM0n is captured to CR00n. Specify detection of both the edges of the TI00n and TI01n pins.
By this measurement method, the previous count value is subtracted from the count value captured by the edge of
each input signal. Therefore, save the previously captured value to a separate register in advance.
If an overflow occurs, the value becomes negative if the previously captured value is simply subtracted from the
current captured value and, therefore, a borrow occurs (bit 0 (CY) of the program status word (PSW) is set to 1). If
this happens, ignore CY and take the calculated value as the pulse width. In addition, clear bit 0 (OVF0n) of 16-bit
timer mode control register 0n (TMC0n) to 0.
valid edge input)
Capture trigger input
Capture trigger input
(TMC0n3, TMC0n2)
Capture interrupt
Capture interrupt
Capture register
Capture register
TM0n register
2. For how to enable the INTTM00n signal interrupt, see CHAPTER 20 INTERRUPT FUNCTIONS.
n = 0, 1: 78K0/KE2 products whose flash memory is at least 48 KB, and 78K0/KF2 products
Operable bits
Overflow flag
(INTTM01n)
(INTTM00n)
(CR01n)
(CR00n)
(OVF0n)
(TI00n)
(TI01n)
FFFFH
0000H
78K0/KD2 products
78K0/KE2 products whose flash memory is less than 32 KB, and 78K0/KB2, 78K0/KC2,
Figure 7-53. Timing Example of Pulse Width Measurement (1)
0000H
0000H
00
A
• TMC0n = 04H, PRM0n = F0H, CRC0n = 05H
01
M
A
CHAPTER 7 16-BIT TIMER/EVENT COUNTERS 00 AND 01
B
0 write clear
M
N
B
0 write clear
N
C
S
C
0 write clear
D
S
P
D
P
0 write clear
E
Q
E
Q
331
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