DF3048X16V Renesas Electronics America, DF3048X16V Datasheet - Page 9

MCU 5V 128K,PB-FREE 100-TQFP

DF3048X16V

Manufacturer Part Number
DF3048X16V
Description
MCU 5V 128K,PB-FREE 100-TQFP
Manufacturer
Renesas Electronics America
Series
H8® H8/300Hr
Datasheets

Specifications of DF3048X16V

Core Processor
H8/300H
Core Size
16-Bit
Speed
16MHz
Connectivity
SCI, SmartCard
Peripherals
DMA, PWM, WDT
Number Of I /o
70
Program Memory Size
128KB (128K x 8)
Program Memory Type
FLASH
Ram Size
4K x 8
Voltage - Supply (vcc/vdd)
4.5 V ~ 5.5 V
Data Converters
A/D 8x10b; D/A 2x8b
Oscillator Type
Internal
Operating Temperature
-20°C ~ 75°C
Package / Case
100-TQFP, 100-VQFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
DF3048X16V
Manufacturer:
Renesas Electronics America
Quantity:
10 000
Item
All
13.2.6 Serial Control
Register (SCR)
Bit 6-Receive
Interrupt Enable
(RIE)
19.5.3 Programming
Flowchart and
Sample Program
Flowchart for
Programming One
Byte
Figure 19.9
Programming
Flowchart
Page
461
606
Main Revisions for this Edition
All references to Hitachi, Hitachi, Ltd., Hitachi Semiconductors, and
other Hitachi brand names changed to Renesas Technology Corp.
Designation for categories changed from “series” to “group”
Table amended
Bit 6: RIE
0
1
Figure amended
Revision (See Manual for Details)
(clear bit of programmed block to 0)
End (1-byte data programmed)
Select program-verify mode
Clear erase block register
Enable watchdog timer
Disable watchdog timer
(PV bit = 1 in FLMCR)
Verify (read memory)
Select program mode
(P bit = 1 in FLMCR)
Clear
Wait (t
Clear PV bit
Wait (x) µs
Clear P bit
Description
Receive-data-full (RXI) and receive-error (ERI) interrupt requests
are disabled*
Receive-data-full (RXI) and receive-error (ERI) interrupt requests
are enabled
V
VS1
PP
OK
E
) µs
bit
*4
*2
*3
No good
Programming ends
Rev. 7.00 Sep 21, 2005 page vii of xxiv
Clear erase block register
(clear bit of block to be
Programming error
programmed to 0)
Clear
Clear PV bit
n
V
N?
PP
Notes: 1. Write the data to be programmed using a
Yes
E
bit
2. Set the watchdog timer overflow interval
3. Read to verify data from the memory
4. t
5. Programming time x, which is determined
byte transfer instruction.
by setting CKS2 and CKS1 to 0 and
CKS0 to 1.
using a byte transfer instruction.
z:
N:
by the initial time
increases in proportion to n. Thus, set the
initial time to 15.8 s or less to make total
programming time 1 ms or less.
VS1
Verify ends
: 4 µs
No
time does not exceed 1 ms)
5 to 10 s
6 (set N so that total programming
Double the programming
time (x
n + 1
2n
–1
(Initial value)
(n = 1 to 6),
2
n
x)
*5

Related parts for DF3048X16V