DF3048X16V Renesas Electronics America, DF3048X16V Datasheet - Page 146
![MCU 5V 128K,PB-FREE 100-TQFP](/photos/28/61/286123/100-tqfp__100-vqfp_sml.jpg)
DF3048X16V
Manufacturer Part Number
DF3048X16V
Description
MCU 5V 128K,PB-FREE 100-TQFP
Manufacturer
Renesas Electronics America
Series
H8® H8/300Hr
Specifications of DF3048X16V
Core Processor
H8/300H
Core Size
16-Bit
Speed
16MHz
Connectivity
SCI, SmartCard
Peripherals
DMA, PWM, WDT
Number Of I /o
70
Program Memory Size
128KB (128K x 8)
Program Memory Type
FLASH
Ram Size
4K x 8
Voltage - Supply (vcc/vdd)
4.5 V ~ 5.5 V
Data Converters
A/D 8x10b; D/A 2x8b
Oscillator Type
Internal
Operating Temperature
-20°C ~ 75°C
Package / Case
100-TQFP, 100-VQFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
DF3048X16V
Manufacturer:
Renesas Electronics America
Quantity:
10 000
- Current page: 146 of 907
- Download datasheet (6Mb)
Section 5 Interrupt Controller
In this situation, conduct one of the following countermeasures.
Countermeasure 1: When clears IRQaF flag, do not use the bit manipulation instruction, read the
ISR in bytes. Then write a value in bytes which sets IRQnF flag to 0 and other bits to 1.
For example, if a = 0
Countermeasure 2: During IRQb interrupt exception processing, carry out IRQbF flag clear
dummy processing.
For example, if b = 1
5.5.5
NMI is an exception processing that can be executed by the interrupt controller and CPU when the
chip internal circuits are operating normally under a specified electrical characteristics. If an NMI
is executed when the circuits are not operating normally due to some factors such as software or
abnormal interrupt of input to the pins (runaway execution), the operation will not be guaranteed.
Incorrect NMI Operation Factors: Software
1. When an interrupt exception processing is executed in an H8/300H CPU, it is assumed that the
2. Requests for NMIs can be accepted on the rising or falling edge of a pin. Acceptance of the
3. This chip has a break function to implement on-board emulation for specific customers. To use
Rev. 7.00 Sep 21, 2005 page 120 of 878
REJ09B0259-0700
MOV.B @ISR,R0L
MOV.B #HFE,R0L
MOV.B R0L,@ISR
IRQB
stack pointer (SP(ER7)) has already been set by software, and that the stack pointer (SP(ER7))
points to the stack area set in a system such as RAM. If the program is in a runaway execution,
the stack pointer may be overflowed and updated illegally. Therefore, normal operation will
not be guaranteed.
rising or falling edge depends on the setting of the bit NMIEG in the system control register
(SYSCR). It is necessary for the customer to set the bit according to the designated system.
When the program is in a runaway execution, this bit may be rewritten illegally. Therefore, the
system may not operate as expected.
this break function, execute the BRK instruction (H’5770). Note that the BRK instruction is
Notes on Non-Maskable Interrupts (NMI)
MOV.B #HFD,R0L
MOV.B R0L,@ISR
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