DF3048X16V Renesas Electronics America, DF3048X16V Datasheet - Page 416

MCU 5V 128K,PB-FREE 100-TQFP

DF3048X16V

Manufacturer Part Number
DF3048X16V
Description
MCU 5V 128K,PB-FREE 100-TQFP
Manufacturer
Renesas Electronics America
Series
H8® H8/300Hr
Datasheets

Specifications of DF3048X16V

Core Processor
H8/300H
Core Size
16-Bit
Speed
16MHz
Connectivity
SCI, SmartCard
Peripherals
DMA, PWM, WDT
Number Of I /o
70
Program Memory Size
128KB (128K x 8)
Program Memory Type
FLASH
Ram Size
4K x 8
Voltage - Supply (vcc/vdd)
4.5 V ~ 5.5 V
Data Converters
A/D 8x10b; D/A 2x8b
Oscillator Type
Internal
Operating Temperature
-20°C ~ 75°C
Package / Case
100-TQFP, 100-VQFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
DF3048X16V
Manufacturer:
Renesas Electronics America
Quantity:
10 000
Section 10 16-Bit Integrated Timer Unit (ITU)
Timing of Disabling of ITU Output by External Trigger: If the XTGD bit is cleared to 0 in
TOCR in reset-synchronized PWM mode or complementary PWM mode, when an input capture A
signal occurs in channel 1, the master enable bits are cleared to 0 in TOER, disabling ITU output.
Figure 10.55 shows the timing.
Timing of Output Inversion by TOCR: The output levels in reset-synchronized PWM mode and
complementary PWM mode can be inverted by inverting the output level select bits (OLS4 and
OLS3) in TOCR. Figure 10.56 shows the timing.
Rev. 7.00 Sep 21, 2005 page 390 of 878
REJ09B0259-0700
TIOCA
Input capture
signal
TOER
ITU output
pins
N: Arbitrary setting (H'C1 to H'FF)
Figure 10.56 Timing of Inverting of ITU Output Level by Writing to TOCR (Example)
Figure 10.55 Timing of Disabling of ITU Output by External Trigger (Example)
1
pin
Address bus
TOCR
ITU output pin
ITU output
ITU output
N
T
1
H'C0
TOCR address
Generic
input/output
T
2
I/O port
T
3
ITU output
N
Inverted
ITU output
H'C0
I/O port
Generic
input/output

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