DF3048X16V Renesas Electronics America, DF3048X16V Datasheet - Page 156

• Manufacturer Part Number: DF3048X16V
• Description: MCU 5V 128K,PB-FREE 100-TQFP
• Manufacturer: Renesas Electronics America
• Series: H8® H8/300Hr

Specifications of DF3048X16V

• Core Processor: H8/300H
• Core Size: 16-Bit
• Speed: 16MHz
• Connectivity: SCI, SmartCard
• Peripherals: DMA, PWM, WDT
• Number Of I /o: 70
• Program Memory Size: 128KB (128K x 8)
• Program Memory Type: FLASH
• Ram Size: 4K x 8
• Voltage - Supply (vcc/vdd): 4.5 V ~ 5.5 V
• Data Converters: A/D 8x10b; D/A 2x8b
• Oscillator Type: Internal
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 100-TQFP, 100-VQFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

Section 6 Bus Controller
6.2.5
BRCR is an 8-bit readable/writable register that enables address output on bus lines A
enables or disables release of the bus to an external device.
BRCR is initialized to H'FE by a reset and in hardware standby mode. It is not initialized in
software standby mode.
Bit 7—Address 23 Enable (A23E): Enables PA
Writing 0 in this bit enables A
cannot be modified and PA
Bit 6—Address 22 Enable (A22E): Enables PA
Writing 0 in this bit enables A
cannot be modified and PA
Rev. 7.00 Sep 21, 2005 page 130 of 878
REJ09B0259-0700
Bit
Initial value
Read/
Write
Bit 7: A23E
0
1
Bit 6: A22E
0
1
Mode 1, 2, 5, 7
Mode 3, 4, 6
Bus Release Control Register (BRCR)
A23E
Address 23 to 21 enable
These bits enable PA to
PA to be used for A
A
R/W
Description
PA
PA
Description
PA
PA
—
21
7
1
4
address output
4
4
5
5
is the A
is the PA
is the A
is the PA
4
5
has its ordinary input/output functions.
has its ordinary input/output functions.
23
22
A22E
R/W
—
address output from PA
address output from PA
6
1
23
22
4
5
address output pin
address output pin
/TP
/TP
4
5
/TIOCA
/TIOCB
A21E
R/W
23
6
—
5
1
to
1
1
4
input/output pin
5
input/output pin
to be used as the A
to be used as the A
—
—
—
Reserved bits
4
1
4
5
. In modes other than 3, 4, and 6 this bit
. In modes other than 3, 4, and 6 this bit
—
—
—
3
1
23
22
address output pin.
address output pin.
—
—
—
2
1
Bus release enable
Enables or disables
release of the bus to
an external device
—
—
—
1
1
(Initial value)
(Initial value)
23
to A
BRLE
R/W
R/W
0
0
21
and