DF3048X16V Renesas Electronics America, DF3048X16V Datasheet - Page 767

MCU 5V 128K,PB-FREE 100-TQFP

DF3048X16V

Manufacturer Part Number
DF3048X16V
Description
MCU 5V 128K,PB-FREE 100-TQFP
Manufacturer
Renesas Electronics America
Series
H8® H8/300Hr
Datasheets

Specifications of DF3048X16V

Core Processor
H8/300H
Core Size
16-Bit
Speed
16MHz
Connectivity
SCI, SmartCard
Peripherals
DMA, PWM, WDT
Number Of I /o
70
Program Memory Size
128KB (128K x 8)
Program Memory Type
FLASH
Ram Size
4K x 8
Voltage - Supply (vcc/vdd)
4.5 V ~ 5.5 V
Data Converters
A/D 8x10b; D/A 2x8b
Oscillator Type
Internal
Operating Temperature
-20°C ~ 75°C
Package / Case
100-TQFP, 100-VQFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
DF3048X16V
Manufacturer:
Renesas Electronics America
Quantity:
10 000
8. Block transfer instructions
Notes: 1. The number of states is the number of states required for execution when the
EEPMOV. B
EEPMOV. W
Mnemonic
2. n is the value set in register R4L or R4.
(1) Set to 1 when a carry or borrow occurs at bit 11; otherwise cleared to 0.
(2) Set to 1 when a carry or borrow occurs at bit 27; otherwise cleared to 0.
(3) Retains its previous value when the result is zero; otherwise cleared to 0.
(4) Set to 1 when the adjustment produces a carry; otherwise retains its previous value.
(5) The number of states required for execution of an instruction that transfers data in
(6) Set to 1 when the divisor is negative; otherwise cleared to 0.
(7) Set to 1 when the divisor is zero; otherwise cleared to 0.
(8) Set to 1 when the quotient is negative; otherwise cleared to 0.
instruction and its operands are located in on-chip memory. For other cases see
section A.3, Number of States Required for Executi
synchronization with the E clock is variable.
if R4L
until
else next
if R4
until
else next
repeat @R5
repeat @R5
0 then
Operation
0 then
R5+1
R6+1
R4L–1
R4L=0
R5+1
R6+1
R4–1
R4=0
@R6
@R6
R4
R5
R6
R5
R6
R4L
Instruction Length (bytes)
Addressing Mode and
Rev. 7.00 Sep 21, 2005 page 741 of 878
on.
4
4
Appendix A Instruction Set
I
Condition Code
H
N
REJ09B0259-0700
Z
V
— 8+
C
4n
4n
States
8+
No. of
*2
*2
*1

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