DF3048X16V Renesas Electronics America, DF3048X16V Datasheet - Page 157

MCU 5V 128K,PB-FREE 100-TQFP

DF3048X16V

Manufacturer Part Number
DF3048X16V
Description
MCU 5V 128K,PB-FREE 100-TQFP
Manufacturer
Renesas Electronics America
Series
H8® H8/300Hr
Datasheets

Specifications of DF3048X16V

Core Processor
H8/300H
Core Size
16-Bit
Speed
16MHz
Connectivity
SCI, SmartCard
Peripherals
DMA, PWM, WDT
Number Of I /o
70
Program Memory Size
128KB (128K x 8)
Program Memory Type
FLASH
Ram Size
4K x 8
Voltage - Supply (vcc/vdd)
4.5 V ~ 5.5 V
Data Converters
A/D 8x10b; D/A 2x8b
Oscillator Type
Internal
Operating Temperature
-20°C ~ 75°C
Package / Case
100-TQFP, 100-VQFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
DF3048X16V
Manufacturer:
Renesas Electronics America
Quantity:
10 000
Bit 5—Address 21 Enable (A21E): Enables PA
Writing 0 in this bit enables A
cannot be modified and PA
Bits 4 to 1—Reserved: Read-only bits, always read as 1.
Bit 0—Bus Release Enable (BRLE): Enables or disables release of the bus to an external device.
6.2.6
CSCR is an 8-bit readable/writable register that enables or disables output of chip select signals
(CS
If a chip select signal (CS
functions as a chip select signal (CS
functions. CSCR cannot be modified in single-chip mode.
CSCR is initialized to H'0F by a reset and in hardware standby mode. It is not initialized in
software standby mode.
Bit 5: A21E
0
1
Bit 0: BRLE
0
1
Bit
Initial value
Read/Write
7
to CS
Chip Select Control Register (CSCR)
4
).
CS7E
R/W
Description
PA
PA
Description
The bus cannot be released to an external device; BREQ and BACK can be
used as input/output pins
The bus can be released to an external device
7
0
Chip select 7 to 4 enable
These bits enable or disable
chip select signal output
6
6
7
is the A
is the PA
to CS
6
has its ordinary input/output functions.
CS6E
R/W
21
6
0
address output from PA
4
21
) output is selected in this register, the corresponding pin
6
address output pin
/TP
7
to CS
CS5E
6
R/W
/TIOCA
5
0
4
) output, this function taking priority over other
2
6
input/output pin
CS4E
R/W
to be used as the A
4
0
6
. In modes other than 3, 4, and 6 this bit
Rev. 7.00 Sep 21, 2005 page 131 of 878
3
1
21
Reserved bits
2
1
address output pin.
Section 6 Bus Controller
REJ09B0259-0700
1
1
(Initial value)
(Initial value)
0
1

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