DF2370RVFQ34V Renesas Electronics America, DF2370RVFQ34V Datasheet - Page 836
![IC H8S/2370 MCUFLSH 256K 144LQFP](/photos/12/41/124197/df2370rvfq34v_sml.jpg)
DF2370RVFQ34V
Manufacturer Part Number
DF2370RVFQ34V
Description
IC H8S/2370 MCUFLSH 256K 144LQFP
Manufacturer
Renesas Electronics America
Series
H8® H8S/2300r
Datasheet
1.YR0K42378FC000BA.pdf
(1208 pages)
Specifications of DF2370RVFQ34V
Core Processor
H8S/2000
Core Size
16-Bit
Speed
34MHz
Connectivity
I²C, IrDA, SCI, SmartCard
Peripherals
DMA, POR, PWM, WDT
Number Of I /o
96
Program Memory Size
256KB (256K x 8)
Program Memory Type
FLASH
Ram Size
16K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 3.6 V
Data Converters
A/D 16x10b; D/A 6x8b
Oscillator Type
External
Operating Temperature
-20°C ~ 75°C
Package / Case
144-LQFP
For Use With
YLCDRSK2378 - KIT DEV EVAL H8S/2378 LCDYR0K42378FC000BA - KIT EVAL FOR H8S/2378HS0005KCU11H - EMULATOR E10A-USB H8S(X),SH2(A)
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
DF2370RVFQ34V
Manufacturer:
Renesas Electronics America
Quantity:
10 000
- Current page: 836 of 1208
- Download datasheet (8Mb)
Section 15 Serial Communication Interface (SCI, IrDA)
Rev.7.00 Mar. 18, 2009 page 768 of 1136
REJ09B0109-0700
Figure 15.39 shows a sample flowchart for mode transition during reception.
Read TEND flag in SSR
<Start of transmission>
Transition to software
Figure 15.36 Sample Flowchart for Mode Transition during Transmission
Exit from software
operating mode?
<Transmission>
standby mode
standby mode
Yes
Yes
Yes
transmitted?
Initialization
TEND = 1
Change
All data
TE = 0
No
No
No
[1]
[2]
[3]
TE = 1
[1] Data being transmitted is interrupted.
[2] If TIE and TEIE are set to 1, clear
[3] Includes module stop mode.
After exiting software standby mode,
normal CPU transmission is possible
by setting TE to 1, reading SSR,
writing TDR, and clearing TDRE to 0,
but note that if the DTC has been
activated, the remaining data in
DTCRAM will be transmitted when
TE and TIE are set to 1.
them to 0 in the same way.
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