DF2370RVFQ34V Renesas Electronics America, DF2370RVFQ34V Datasheet - Page 368
![IC H8S/2370 MCUFLSH 256K 144LQFP](/photos/12/41/124197/df2370rvfq34v_sml.jpg)
DF2370RVFQ34V
Manufacturer Part Number
DF2370RVFQ34V
Description
IC H8S/2370 MCUFLSH 256K 144LQFP
Manufacturer
Renesas Electronics America
Series
H8® H8S/2300r
Datasheet
1.YR0K42378FC000BA.pdf
(1208 pages)
Specifications of DF2370RVFQ34V
Core Processor
H8S/2000
Core Size
16-Bit
Speed
34MHz
Connectivity
I²C, IrDA, SCI, SmartCard
Peripherals
DMA, POR, PWM, WDT
Number Of I /o
96
Program Memory Size
256KB (256K x 8)
Program Memory Type
FLASH
Ram Size
16K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 3.6 V
Data Converters
A/D 16x10b; D/A 6x8b
Oscillator Type
External
Operating Temperature
-20°C ~ 75°C
Package / Case
144-LQFP
For Use With
YLCDRSK2378 - KIT DEV EVAL H8S/2378 LCDYR0K42378FC000BA - KIT EVAL FOR H8S/2378HS0005KCU11H - EMULATOR E10A-USB H8S(X),SH2(A)
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
DF2370RVFQ34V
Manufacturer:
Renesas Electronics America
Quantity:
10 000
- Current page: 368 of 1208
- Download datasheet (8Mb)
Section 7 DMA Controller (DMAC)
Bit
6
Rev.7.00 Mar. 18, 2009 page 300 of 1136
REJ09B0109-0700
Bit Name
DTE1
Initial Value
0
R/W
R/W
Description
Data Transfer Enable 1
Enables or disables DMA transfer for the activation
source selected by the DTF3 to DTF0 bits in
DMACR of channel 1.
When DTE1 = 0, data transfer is disabled and the
activation source is ignored. If the activation source
is an internal interrupt, an interrupt request is
issued to the CPU or DTC. If the DTE1 bit is
cleared to 0 when DTIE1 = 1, the DMAC regards
this as indicating the end of a transfer, and issues a
transfer end interrupt request to the CPU.
When DTE1 = 1 and DTME1 = 1, data transfer is
enabled and the DMAC waits for a request by the
activation source. When a request is issued by the
activation source, DMA transfer is executed.
[Clearing conditions]
•
•
•
[Setting condition]
When 1 is written to the DTE1 bit after reading
DTE1 = 0
When initialization is performed
When the specified number of transfers have
been completed
When 0 is written to the DTE1 bit to forcibly
suspend the transfer, or for a similar reason
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