DF2370RVFQ34V Renesas Electronics America, DF2370RVFQ34V Datasheet - Page 13
![IC H8S/2370 MCUFLSH 256K 144LQFP](/photos/12/41/124197/df2370rvfq34v_sml.jpg)
DF2370RVFQ34V
Manufacturer Part Number
DF2370RVFQ34V
Description
IC H8S/2370 MCUFLSH 256K 144LQFP
Manufacturer
Renesas Electronics America
Series
H8® H8S/2300r
Datasheet
1.YR0K42378FC000BA.pdf
(1208 pages)
Specifications of DF2370RVFQ34V
Core Processor
H8S/2000
Core Size
16-Bit
Speed
34MHz
Connectivity
I²C, IrDA, SCI, SmartCard
Peripherals
DMA, POR, PWM, WDT
Number Of I /o
96
Program Memory Size
256KB (256K x 8)
Program Memory Type
FLASH
Ram Size
16K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 3.6 V
Data Converters
A/D 16x10b; D/A 6x8b
Oscillator Type
External
Operating Temperature
-20°C ~ 75°C
Package / Case
144-LQFP
For Use With
YLCDRSK2378 - KIT DEV EVAL H8S/2378 LCDYR0K42378FC000BA - KIT EVAL FOR H8S/2378HS0005KCU11H - EMULATOR E10A-USB H8S(X),SH2(A)
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
DF2370RVFQ34V
Manufacturer:
Renesas Electronics America
Quantity:
10 000
- Current page: 13 of 1208
- Download datasheet (8Mb)
Item
10.12.5 Pin Functions
10.13.5 Pin Functions
10.14.4 Pin Functions
• PF7/φ
10.16.1 Port H Data
Direction Register
(PHDDR)
15.3.7 Serial Status
Register (SSR)
Normal Serial
Communication
Interface Mode (When
SMIF in SCMR is 0)
Smart Card Interface
Mode (When SMIF in
SCMR is 1)
Page
523
527
531
541
705
709
Revision (See Manual for Details)
Table amended
Legend added
Legend: n = 7 to 0
Table amended
Legend added
Legend: n = 7 to 0
Table amended
Table amended
Note amended
Note: * Only 0 can be written, to clear the flag. Alternately,
Note amended
Note: 1. Only 0 can be written, to clear the flag. Alternately,
Bit
3
2
1
0
PDnDDR
Pin function
PEnDDR
Pin function
PF7DDR
Bit Name
PH3DDR
PH2DDR
PH1DDR
PH0DDR
2. Elementary time unit (etu): Transfer duration for one
input
use the bit clear instruction to clear the flag.
PEn
use the bit clear instruction to clear the flag.
bit
0
Initial Value
0
0
0
0
Data I/O
output
—
PEn
1
R/W
W
W
W
W
Data I/O
0
—
Rev.7.00 Mar. 18, 2009 page xi of lxvi
Description
• Mode 7 (when EXPE = 0)
PDn input
Pins PH3 to PH0 are I/O ports, and their functions can be switched with
PHDDR.
Pin PH1 functions as the SDRAMφ *
DCTL pin *
PH1 is an I/O port and its function can be switched with PHDDR.
0
input
PEn
0
2
is high. When the input level of the DCTL pin *
output
PEn
1
PDn output
input
PEn
0
1
1
output pin when the input level of the
REJ09B0109-0700
output
PEn
1
1
Data I/O
Data I/O
2
—
is low, pin
—
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