MCF5281CVM66J Freescale Semiconductor, MCF5281CVM66J Datasheet - Page 661

• Manufacturer Part Number: MCF5281CVM66J
• Description: IC MPU 256K FLASH 256MAPBGA
• Manufacturer: Freescale Semiconductor
• Series: MCF528xr

Specifications of MCF5281CVM66J

• Core Processor: Coldfire V2
• Core Size: 32-Bit
• Speed: 66MHz
• Connectivity: CAN, EBI/EMI, Ethernet, I²C, SPI, UART/USART
• Peripherals: DMA, LVD, POR, PWM, WDT
• Number Of I /o: 150
• Program Memory Size: 256KB (256K x 8)
• Program Memory Type: FLASH
• Ram Size: 64K x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 3.6 V
• Data Converters: A/D 8x10b
• Oscillator Type: External
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 256-MAPBGA
• Processor Series: MCF528x
• Core: ColdFire V2
• 3rd Party Development Tools: JLINK-CF-BDM26, EWCF
• Development Tools By Supplier: NNDK-MOD5282-KIT
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: Details

For all types of exception processing, the PST = 0xC value is driven at all times, unless the PST output is
needed for one of the optional marker values or for the taken branch indicator (0x5).
Table 30-23
30.7.2
The supervisor instruction set has complete access to the user mode instructions plus the opcodes shown
below. The PST/DDATA specification for these opcodes is shown in
Freescale Semiconductor
Instruction
msac.w
msac.w
mac.w
mac.w
move.l
move.l
move.l
move.l
move.l
move.l
move.l
move.l
move.l
move.l
move.l
move.l
msac.l
msac.l
mac.l
mac.l
Instruction
move.w
move.w
cpushl
movec
halt
Supervisor Instruction Set
shows the PST/DDATA specification for multiply-accumulate instructions.
Table 30-24. PST/DDATA Specification for Supervisor-Mode Instructions
Ry,Rx,<ea>,Rw,Accx PST = 0x1, {PST = 0xB, DD = source operand}
Ry,Rx,<ea>,Rw,Accx PST = 0x1, {PST = 0xB, DD = source operand}
Ry,Rx,<ea>,Rw,Accx PST = 0x1, {PST = 0xB, DD = source operand}
RyRx,<ea>,Rw,Accx PST = 0x1, {PST = 0xB, DD = source operand}
Operand Syntax
Operand Syntax
<ea>y,Accext01
<ea>y,Accext23
MACSR,CCR
<ea>y,MACR
<ea>y,MASK
{Dy,#imm},SR
Accext01,Rx
Accext23,Rx
<ea>y,Accx
Ry,Rx,Accx
Ry,Rx,Accx
MACSR,Rx
Ry,Rx,Accx
Ry,Rx,Accx
Accy,Accx
MASK,Rx
Table 30-23. PST/DDATA Specification for MAC Instructions
Accy,Rx
MCF5282 and MCF5216 ColdFire Microcontroller User’s Manual, Rev. 3
SR,Dx
Ry,Rc
PST = 0x1
PST = 0x1,
PST = 0xF
PST = 0x1
PST = 0x1, {PST = 0x3}
PST = 0x1
PST = 0x1
PST = 0x1
PST = 0x1
PST = 0x1
PST = 0x1
PST = 0x1
PST = 0x1
PST = 0x1
PST = 0x1
PST = 0x1
PST = 0x1
PST = 0x1
PST = 0x1
PST = 0x1
PST = 0x1
PST = 0x1
PST/DDATA
PST/DDATA
Table
30-24.
Debug Support
30-43