ST7FLITEUS5B6 STMicroelectronics, ST7FLITEUS5B6 Datasheet - Page 76

• Manufacturer Part Number: ST7FLITEUS5B6
• Description: MCU 8BIT 1KB FLASH 128KB 8-DIP
• Manufacturer: STMicroelectronics
• Series: ST7r

Specifications of ST7FLITEUS5B6

• Core Processor: ST7
• Core Size: 8-Bit
• Speed: 8MHz
• Peripherals: LVD, POR, PWM, WDT
• Number Of I /o: 5
• Program Memory Size: 1KB (1K x 8)
• Program Memory Type: FLASH
• Ram Size: 128 x 8
• Voltage - Supply (vcc/vdd): 2.4 V ~ 5.5 V
• Data Converters: A/D 5x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 8-DIP (0.300", 7.62mm)
• Controller Family/series: ST7
• No. Of I/o's: 5
• Ram Memory Size: 128Byte
• Cpu Speed: 8MHz
• No. Of Timers: 2
• Rohs Compliant: Yes
• For Use With: 497-6403 - BOARD EVAL 8BIT MICRO + TDE1708497-6407 - BOARD EVAL FOR VACUUM CLEANER497-5861 - EVAL BRD POWER MOSFET/8PIN MCU497-5858 - EVAL BOARD PLAYBACK ST7FLITE497-5515 - EVAL BOARD PHASE CTRL DIMMER497-5049 - KIT STARTER RAISONANCE ST7FLITE497-5046 - KIT TOOL FOR ST7/UPSD/STR7 MCU
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Connectivity: -
• Other names: 497-5636-5

On-chip peripherals
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Auto reload register (ATRL)
This is a 12-bit register which is written by software. The ATR register value is automatically
loaded into the upcounter when an overflow occurs. The register value is used to set the
PWM frequency.
Reset value: 0000 0000 (00h)
PWM0 duty cycle register high (DCR0H)
Reset value: 0000 0000 (00h)
PWM0 duty cycle register low (DCR0L)
This 12-bit value is written by software. The high register must be written first.
In PWM mode (OE0=1 in the PWMCR register) the DCR[11:0] bits define the duty cycle of
the PWM0 output signal (see
register) they define the value to be compared with the 12-bit upcounter value.
Reset value: 0000 0000 (00h)
DCR7
ATR7
15
7
0
7
Bits 15:12 Reserved, must be kept cleared.
Bits 15:12 Reserved, must be kept cleared.
Bits 11:0 ATR[11:0] Auto-reload Register.
Bits 11:0 DCR[11:0] PWMx duty cycle value
DCR6
ATR6
0
DCR5
ATR5
0
Figure
34). In Output Compare mode, (OE0=0 in the PWMCR
DCR4
ATR4
0
Read/Write
Read/Write
Read/Write
DCR11
DCR3
ATR3
DCR10
DCR2
ATR2
ST7LITEUS2, ST7LITEUS5
DCR9
DCR1
ATR1
DCR8
DCR0
ATR0
0
8
0