ST7FLITEUS5B6 STMicroelectronics, ST7FLITEUS5B6 Datasheet - Page 41

• Manufacturer Part Number: ST7FLITEUS5B6
• Description: MCU 8BIT 1KB FLASH 128KB 8-DIP
• Manufacturer: STMicroelectronics
• Series: ST7r

Specifications of ST7FLITEUS5B6

• Core Processor: ST7
• Core Size: 8-Bit
• Speed: 8MHz
• Peripherals: LVD, POR, PWM, WDT
• Number Of I /o: 5
• Program Memory Size: 1KB (1K x 8)
• Program Memory Type: FLASH
• Ram Size: 128 x 8
• Voltage - Supply (vcc/vdd): 2.4 V ~ 5.5 V
• Data Converters: A/D 5x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 8-DIP (0.300", 7.62mm)
• Controller Family/series: ST7
• No. Of I/o's: 5
• Ram Memory Size: 128Byte
• Cpu Speed: 8MHz
• No. Of Timers: 2
• Rohs Compliant: Yes
• For Use With: 497-6403 - BOARD EVAL 8BIT MICRO + TDE1708497-6407 - BOARD EVAL FOR VACUUM CLEANER497-5861 - EVAL BRD POWER MOSFET/8PIN MCU497-5858 - EVAL BOARD PLAYBACK ST7FLITE497-5515 - EVAL BOARD PHASE CTRL DIMMER497-5049 - KIT STARTER RAISONANCE ST7FLITE497-5046 - KIT TOOL FOR ST7/UPSD/STR7 MCU
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Connectivity: -
• Other names: 497-5636-5

ST7LITEUS2, ST7LITEUS5
Table 9.
1. This interrupt exits the MCU from Auto-wakeup from Halt mode only.
2. This interrupt exits the MCU from Wait and Active-halt modes only. Moreover, IS4[1:0] = 01 is the only safe configuration to
3. These interrupts exit the MCU from Active-halt mode only.
7.3.1
6
N°
10
11
12
13
0
1
2
3
4
5
7
8
9
2)
avoid spurious interrupt in Halt and AWUFH mode
Source block
LITE TIMER
AT TIMER
RESET
TRAP
ei4
AWU
ei0
ei1
ei2
ei3
SI
Interrupt mapping
External Interrupt Control register 1 (EICR1)
Reset value: 0000 0000 (00h)
2)
7
0
Software interrupt
External interrupt 0
External interrupt 1
External interrupt 2
Not used
External interrupt 3
External interrupt 4
AVD interrupt
AT TIMER Output Compare Interrupt
AT TIMER Overflow Interrupt
LITE TIMER Input Capture Interrupt
LITE TIMER RTC1 Interrupt
Not used
Not used
Reset
Auto-wakeup interrupt
Bits 7:6 Reserved
Bits 5:4 IS2[1:0] ei2 sensitivity
Bits 3:2 IS1[1:0] ei1 sensitivity
Bits 1:0 IS0[1:0] ei0 sensitivity
These bits define the interrupt sensitivity for ei2 according to
These bits define the interrupt sensitivity for ei1 according to
These bits define the interrupt sensitivity for ei0 according to
0
Description
2)
IS21
IS20
Read/Write
AWUCSR
PWMxCS
Register
ATCSR
ATCSR
LTCSR
LTCSR
SICSR
label
R or
IS11
N/A
N/A
Priority
Highest
Lowest
priority
priority
order
IS10
yes
yes
yes
from
no
Halt
Exit
yes
yes
yes
no
no
no
no
no
no
no
Table
Table
Table
(2)
(1)
(3)
(3)
IS01
FFECh-FFEDh
FFFCh-FFFDh
FFEEh-FFEFh
FFEAh-FFEBh
10.
10.
10.
FFFEh-FFFFh
FFFAh-FFFBh
FFE8h-FFE9h
FFE6h-FFE7h
FFE4h-FFE5h
FFE2h-FFE3h
FFE0h-FFE1h
FFF8h-FFF9h
FFF6h-FFF7h
FFF4h-FFF5h
FFF2h-FFF3h
FFF0h-FFF1h
Address
vector
Interrupts
IS00
0
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