ST7FLITEUS5B6 STMicroelectronics, ST7FLITEUS5B6 Datasheet - Page 32

• Manufacturer Part Number: ST7FLITEUS5B6
• Description: MCU 8BIT 1KB FLASH 128KB 8-DIP
• Manufacturer: STMicroelectronics
• Series: ST7r

Specifications of ST7FLITEUS5B6

• Core Processor: ST7
• Core Size: 8-Bit
• Speed: 8MHz
• Peripherals: LVD, POR, PWM, WDT
• Number Of I /o: 5
• Program Memory Size: 1KB (1K x 8)
• Program Memory Type: FLASH
• Ram Size: 128 x 8
• Voltage - Supply (vcc/vdd): 2.4 V ~ 5.5 V
• Data Converters: A/D 5x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 8-DIP (0.300", 7.62mm)
• Controller Family/series: ST7
• No. Of I/o's: 5
• Ram Memory Size: 128Byte
• Cpu Speed: 8MHz
• No. Of Timers: 2
• Rohs Compliant: Yes
• For Use With: 497-6403 - BOARD EVAL 8BIT MICRO + TDE1708497-6407 - BOARD EVAL FOR VACUUM CLEANER497-5861 - EVAL BRD POWER MOSFET/8PIN MCU497-5858 - EVAL BOARD PLAYBACK ST7FLITE497-5515 - EVAL BOARD PHASE CTRL DIMMER497-5049 - KIT STARTER RAISONANCE ST7FLITE497-5046 - KIT TOOL FOR ST7/UPSD/STR7 MCU
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Connectivity: -
• Other names: 497-5636-5

Supply, reset and clock management
6.3.4
6.3.5
32/136
AVD Threshold Selection register (AVDTHCR)
Reset value: 0000 0011 (03h)
Table 6.
1. If the internal RC is used with a supply operating range below 3.3 V, a division ratio of at least 2 must be
Clock Controller Control/Status register (CKCNTCSR)
Read/Write
Reset value: 0000 1001 (09h)
CK2
enabled in the RC prescaler.
CK2
0
0
0
0
1
7
0
7
Bits 7:5 CK[2:0] Internal RC Prescaler Selection
Bits 4:2 Reserved, must be kept cleared.
Bits 1:0 AVD Threshold Selection bits. Refer to
Bits 7:4 Reserved, must be kept cleared.
Bit 3 AWU_FLAG AWU Selection
Internal RC prescaler selection bits
CK1
CK1
0
0
1
1
0
0
These bits are set by software and cleared by hardware after a reset. These bits
select the prescaler of the internal RC oscillator. See
Table
(SI).
This bit is set and cleared by hardware
0: No switch from AWU to RC requested
1: AWU clock activated and temporization completed
6.
CK0
CK0
0
1
0
1
0
0
0
0
Read / Write
Read / Write
AWU_FLAG
0
(1)
Section 7.4: System integrity management
f
f
f
f
f
RC/16
FLAG
RC/2
RC/4
RC/8
RC_
OSC
f
RC
0
ST7LITEUS2, ST7LITEUS5
Figure 10 on page 34
AVD1
0
RC/AWU
AVD0
0
and
0