AT91SAM9XE256-CU Atmel, AT91SAM9XE256-CU Datasheet - Page 814

• Manufacturer Part Number: AT91SAM9XE256-CU
• Description: MCU ARM9 256K FLASH 217-BGA
• Manufacturer: Atmel
• Series: AT91SAMr

Specifications of AT91SAM9XE256-CU

• Core Processor: ARM9
• Core Size: 16/32-Bit
• Speed: 180MHz
• Connectivity: EBI/EMI, Ethernet, I²C, MMC, SPI, SSC, UART/USART, USB
• Peripherals: Brown-out Detect/Reset, POR, PWM, WDT
• Number Of I /o: 96
• Program Memory Size: 256KB (256K x 8)
• Program Memory Type: FLASH
• Ram Size: 56K x 8
• Voltage - Supply (vcc/vdd): 1.65 V ~ 1.95 V
• Data Converters: A/D 4x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 217-LFBGA
• Processor Series: AT91SAMx
• Core: ARM926EJ-S
• Data Bus Width: 32 bit
• Data Ram Size: 32 KB
• Interface Type: 2-Wire, EBI, I2S, SPI, USART
• Maximum Clock Frequency: 180 MHz
• Number Of Programmable I/os: 96
• Number Of Timers: 6
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: JTRACE-ARM-2M, KSK-AT91SAM9XE-PL, MDK-ARM, RL-ARM, ULINK2
• Development Tools By Supplier: AT91SAM-ICE, AT91-ISP, AT91SAM9XE-EK
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 10 bit, 4 Channel
• Package: 217LFBGA
• Device Core: ARM926EJ-S
• Family Name: 91S
• Maximum Speed: 180 MHz
• Operating Supply Voltage: 1.8|2.5|3.3 V
• For Use With: AT91SAM9XE-EK - KIT EVAL FOR AT91SAM9XEAT91SAM-ICE - EMULATOR FOR AT91 ARM7/ARM9
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

43.12 SMC Timings
43.12.1
43.12.2
Table 43-28. SMC Read Signals - NRD Controlled (READ_MODE = 1)
Table 43-29. SMC Read Signals - NCS Controlled (READ_MODE= 0)
814
Symbol
SMC
SMC
SMC
SMC
SMC
SMC
SMC
Symbol
1
2
3
4
5
6
7
AT91SAM9XE128/256/512 Preliminary
Timing Conditions
Read Timings
Parameter
Data Setup before NRD High
Data Hold after NRD High
Data Setup before NRD High
Data Hold after NRD High
A2 - A25 Valid before NRD High
NCS low before NRD High
NRD Pulse Width
Parameter
NBS0/A0, NBS1, NBS2/A1, NBS3,
SMC timings are given in worst case conditions (1.65V/3.0V, 85°C).
Timings are given assuming a capacitance load on data, control and address pads:
Table 43-27. Capacitance Load
In the following tables t
Supply
3.3V
1.8V
VDDIOM supply
VDDIOM supply
HOLD or NO HOLD SETTINGS (nrd hold … 0, nrd hold =0)
NO HOLD SETTINGS (ncs rd hold = 0)
NO HOLD SETTINGS (nrd hold = 0)
C
50pF
30 pF
LOAD
HOLD SETTINGS (nrd hold … 0)
nrd pulse - ncs
(nrd setup +
(nrd setup +
CPMCK
nrd pulse)*
t
t
nrd pulse *
t
rd setup) *
CPMCK
CPMCK
CPMCK
Max
1.8V
12.6
-7.2
1.8V
9
0
represents the MCK period.
-3.0
-7.1
-0.3
Min
Min
nrd pulse - ncs
(nrd setup +
(nrd setup +
nrd pulse)*
t
t
nrd pulse *
t
rd setup) *
CPMCK
CPMCK
CPMCK
12.61
3.3V
3.3V
-7.2
9
0
-0.3
-3.1
-7.2
1.8V
1.8V
Max
Max
3.3V
3.3V
6254C–ATARM–22-Jan-10
Units
Units
ns
ns
ns
ns
ns
ns
ns