AT91SAM9XE256-CU Atmel, AT91SAM9XE256-CU Datasheet - Page 750

• Manufacturer Part Number: AT91SAM9XE256-CU
• Description: MCU ARM9 256K FLASH 217-BGA
• Manufacturer: Atmel
• Series: AT91SAMr

Specifications of AT91SAM9XE256-CU

• Core Processor: ARM9
• Core Size: 16/32-Bit
• Speed: 180MHz
• Connectivity: EBI/EMI, Ethernet, I²C, MMC, SPI, SSC, UART/USART, USB
• Peripherals: Brown-out Detect/Reset, POR, PWM, WDT
• Number Of I /o: 96
• Program Memory Size: 256KB (256K x 8)
• Program Memory Type: FLASH
• Ram Size: 56K x 8
• Voltage - Supply (vcc/vdd): 1.65 V ~ 1.95 V
• Data Converters: A/D 4x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 217-LFBGA
• Processor Series: AT91SAMx
• Core: ARM926EJ-S
• Data Bus Width: 32 bit
• Data Ram Size: 32 KB
• Interface Type: 2-Wire, EBI, I2S, SPI, USART
• Maximum Clock Frequency: 180 MHz
• Number Of Programmable I/os: 96
• Number Of Timers: 6
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: JTRACE-ARM-2M, KSK-AT91SAM9XE-PL, MDK-ARM, RL-ARM, ULINK2
• Development Tools By Supplier: AT91SAM-ICE, AT91-ISP, AT91SAM9XE-EK
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 10 bit, 4 Channel
• Package: 217LFBGA
• Device Core: ARM926EJ-S
• Family Name: 91S
• Maximum Speed: 180 MHz
• Operating Supply Voltage: 1.8|2.5|3.3 V
• For Use With: AT91SAM9XE-EK - KIT EVAL FOR AT91SAM9XEAT91SAM-ICE - EMULATOR FOR AT91 ARM7/ARM9
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

41.2
Figure 41-2. Image Sensor Interface Block Diagram
41.3
750
Hsync/Len
Vsync/Fen
RGB
YCbCr 4:2:2
CMOS
sensor
Pixel input
up to 12 bit
CMOS
sensor
pixel clock
input
8:8:8
5:6:5
Block Diagram
Functional Description
AT91SAM9XE128/256/512 Preliminary
Decoder(SAV/EAV)
Embedded Timing
Timing Signals
Pixel Sampling
Frame Rate
CCIR-656
Interface
Module
The Image Sensor Interface (ISI) supports direct connection to the ITU-R BT. 601/656 8-bit
mode compliant sensors and up to 12-bit grayscale sensors. It receives the image data stream
from the image sensor on the 12-bit data bus.
This module receives up to 12 bits for data, the horizontal and vertical synchronizations and the
pixel clock. The reduced pin count alternative for synchronization is supported for sensors that
embed SAV (start of active video) and EAV (end of active video) delimiters in the data stream.
The Image Sensor Interface interrupt line is generally connected to the Advanced Interrupt Con-
troller and can trigger an interrupt at the beginning of each frame and at the end of a DMA frame
transfer. If the SAV/EAV synchronization is used, an interrupt can be triggered on each delimiter
event.
For 8-bit color sensors, the data stream received can be in several possible formats: YCbCr
4:2:2, RGB 8:8:8, RGB 5:6:5 and may be processed before the storage in memory. The data
stream may be sent on both preview path and codec path if the bit CODEC_ON in the ISI_CR1
is one. To optimize the bandwidth, the codec path should be enabled only when a capture is
required.
In grayscale mode, the input data stream is stored in memory without any processing. The 12-bit
data, which represent the grayscale level for the pixel, is stored in memory one or two pixels per
word, depending on the GS_MODE bit in the ISI_CR2 register. The data is stored via the pre-
view path without any treatment (scaling, color conversion,…). The size of the sensor must be
programmed in the fields IM_VSIZE and IM_HSIZE in the ISI_CR2 register.The programming of
the preview path register (ISI_PSIZE) is not necessary. The codec datapath is not available
when grayscale image is selected.
A frame rate counter allows users to capture all frames or 1 out of every 2 to 8 frames.
codec_on
Clipping + Color
Clipping + Color
YCC to RGB
Conversion
RGB to YCC
Conversion
Controller
Interrupt
Camera
2-D Image
From
Rx buffers
Scaler
Camera
Interrupt Request Line
Formatter
Formatter
Packed
Pixel
Clock Domain
Pixel
Rx Direct
Rx Direct
Capture
Display
FIFO
FIFO
APB
Clock Domain
AHB
Clock Domain
Registers
Config
Arbiter
Video
Core
6254C–ATARM–22-Jan-10
Interface
Interface
Camera
Support
Master
Scatter
AHB
Mode
APB