ATSAM3S4AA-MU Atmel, ATSAM3S4AA-MU Datasheet - Page 617

IC MCU 32BIT 256KB FLASH 48QFN

ATSAM3S4AA-MU

Manufacturer Part Number
ATSAM3S4AA-MU
Description
IC MCU 32BIT 256KB FLASH 48QFN
Manufacturer
Atmel
Series
SAM3Sr
Datasheets

Specifications of ATSAM3S4AA-MU

Core Processor
ARM® Cortex-M3™
Core Size
32-Bit
Speed
64MHz
Connectivity
I²C, MMC, SPI, SSC, UART/USART, USB
Peripherals
Brown-out Detect/Reset, DMA, I²S, POR, PWM, WDT
Number Of I /o
34
Program Memory Size
256KB (256K x 8)
Program Memory Type
FLASH
Ram Size
48K x 8
Voltage - Supply (vcc/vdd)
1.62 V ~ 1.95 V
Data Converters
A/D 8x10/12b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
48-VQFN Exposed Pad, 48-HVQFN, 48-SQFN, 48-DHVQFN
Processor Series
ATSAM3x
Core
ARM Cortex M3
3rd Party Development Tools
JTRACE-CM3, MDK-ARM, RL-ARM, ULINK2
Development Tools By Supplier
ATSAM3S-EK
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / Rohs Status
 Details

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
ATSAM3S4AA-MU
Manufacturer:
MICROCHIP/微芯
Quantity:
20 000
31.5
Figure 31-2. Application Block Diagram
31.5.1
Table 31-3.
31.6
31.6.1
6500C–ATARM–8-Feb-11
Pin Name
TWD
TWCK
Application Block Diagram
Product Dependencies
I/O Lines Description
I/O Lines
I/O Lines Description
Rp: Pull up value as given by the I²C Standard
Host with
Interface
TWI
Both TWD and TWCK are bidirectional lines, connected to a positive supply voltage via a current
source or pull-up resistor (see
high. The output stages of devices connected to the bus must have an open-drain or open-col-
lector to perform the wired-AND function.
TWD and TWCK pins may be multiplexed with PIO lines. To enable the TWI, the programmer
must perform the following step:
The user must not program TWD and TWCK as open-drain. It is already done by the hardware.
Table 31-4.
TWD
TWCK
• Program the PIO controller to dedicate TWD and TWCK as peripheral lines.
Serial EEPROM
Instance
Pin Description
Two-wire Serial Data
Two-wire Serial Clock
TWI0
TWI0
TWI1
TWI1
Atmel TWI
Slave 1
I/O Lines
I²C RTC
Slave 2
Figure 31-2 on page
TWCK0
TWCK1
Signal
TWD0
TWD1
Controller
I²C LCD
Slave 3
I²C Temp.
617). When the bus is free, both lines are
Slave 4
Sensor
SAM3S Preliminary
I/O Line
Rp
PB5
PB4
PA4
PA3
Rp
Peripheral
VDD
Input/Output
Input/Output
Type
A
A
A
A
617

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