ATSAM3S4AA-MU Atmel, ATSAM3S4AA-MU Datasheet - Page 144

IC MCU 32BIT 256KB FLASH 48QFN

ATSAM3S4AA-MU

Manufacturer Part Number
ATSAM3S4AA-MU
Description
IC MCU 32BIT 256KB FLASH 48QFN
Manufacturer
Atmel
Series
SAM3Sr
Datasheets

Specifications of ATSAM3S4AA-MU

Core Processor
ARM® Cortex-M3™
Core Size
32-Bit
Speed
64MHz
Connectivity
I²C, MMC, SPI, SSC, UART/USART, USB
Peripherals
Brown-out Detect/Reset, DMA, I²S, POR, PWM, WDT
Number Of I /o
34
Program Memory Size
256KB (256K x 8)
Program Memory Type
FLASH
Ram Size
48K x 8
Voltage - Supply (vcc/vdd)
1.62 V ~ 1.95 V
Data Converters
A/D 8x10/12b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
48-VQFN Exposed Pad, 48-HVQFN, 48-SQFN, 48-DHVQFN
Processor Series
ATSAM3x
Core
ARM Cortex M3
3rd Party Development Tools
JTRACE-CM3, MDK-ARM, RL-ARM, ULINK2
Development Tools By Supplier
ATSAM3S-EK
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / Rohs Status
 Details

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
ATSAM3S4AA-MU
Manufacturer:
MICROCHIP/微芯
Quantity:
20 000
10.18.7
10.18.7.1
10.18.7.2
10.18.7.3
10.18.7.4
10.18.7.5
144
MSR
SAM3S Preliminary
CONTROL, R1 ; Read R1 value and write it to the CONTROL register
MSR
Syntax
Operation
Restrictions
Condition flags
Examples
Move the contents of a general-purpose register into the specified special register.
where:
cond
Rn
spec_reg
PRIMASK, BASEPRI, BASEPRI_MAX, FAULTMASK, or CONTROL.
The register access operation in MSR depends on the privilege level. Unprivileged software can
only access the APSR, see
ware can access all special registers.
In unprivileged software writes to unallocated or execution state bits in the PSR are ignored.
When you write to BASEPRI_MAX, the instruction writes to BASEPRI only if either:
See
Rn must not be SP and must not be PC.
This instruction updates the flags explicitly based on the value in Rn.
• Rn is non-zero and the current BASEPRI value is 0
• Rn is non-zero and less than the current BASEPRI value.
MSR{cond} spec_reg, Rn
“MRS” on page
is an optional condition code, see
is the source register.
can be any of: APSR, IPSR, EPSR, IEPSR, IAPSR, EAPSR, PSR, MSP, PSP,
143.
“Application Program Status Register” on page
“Conditional execution” on page
46. Privileged soft-
6500C–ATARM–8-Feb-11
84.

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