ATSAM3S4AA-MU Atmel, ATSAM3S4AA-MU Datasheet - Page 117

• Manufacturer Part Number: ATSAM3S4AA-MU
• Description: IC MCU 32BIT 256KB FLASH 48QFN
• Manufacturer: Atmel
• Series: SAM3Sr

Specifications of ATSAM3S4AA-MU

• Core Processor: ARM® Cortex-M3™
• Core Size: 32-Bit
• Speed: 64MHz
• Connectivity: I²C, MMC, SPI, SSC, UART/USART, USB
• Peripherals: Brown-out Detect/Reset, DMA, I²S, POR, PWM, WDT
• Number Of I /o: 34
• Program Memory Size: 256KB (256K x 8)
• Program Memory Type: FLASH
• Ram Size: 48K x 8
• Voltage - Supply (vcc/vdd): 1.62 V ~ 1.95 V
• Data Converters: A/D 8x10/12b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 48-VQFN Exposed Pad, 48-HVQFN, 48-SQFN, 48-DHVQFN
• Processor Series: ATSAM3x
• Core: ARM Cortex M3
• 3rd Party Development Tools: JTRACE-CM3, MDK-ARM, RL-ARM, ULINK2
• Development Tools By Supplier: ATSAM3S-EK
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: Details

10.13.8
10.13.8.1
10.13.8.2
10.13.8.3
10.13.8.4
10.13.8.5
6500C–ATARM–8-Feb-11
REV
REV16
REVSH
REVHS
RBIT
REV, REV16, REVSH, and RBIT
Syntax
Operation
Restrictions
Condition flags
Examples
R3, R7
R0, R0
R0, R5
R3, R7
R7, R8
Reverse bytes and Reverse bits.
where:
op
cond
Rd
Rn
Use these instructions to change endianness of data:
REV
into big-endian data.
REV16
into big-endian data.
REVSH
Do not use SP and do not use PC
These instructions do not change the flags.
; Reverse byte order of value in R7 and write it to R3
; Reverse byte order of each 16-bit halfword in R0
; Reverse Signed Halfword
; Reverse with Higher or Same condition
; Reverse bit order of value in R8 and write the result to R7
op{cond} Rd, Rn
REV
REV16 Reverse byte order in each halfword independently.
REVSH Reverse byte order in the bottom halfword, and sign extend to 32 bits.
RBIT
16-bit signed big-endian data into 32-bit signed little-endian data
16-bit signed little-endian data into 32-bit signed big-endian data.
is any of:
Reverse byte order in a word.
Reverse the bit order in a 32-bit word.
is an optional condition code, see
is the destination register.
is the register holding the operand.
converts 32-bit big-endian data into little-endian data or 32-bit little-endian data
converts 16-bit big-endian data into little-endian data or 16-bit little-endian data
converts either:
.
“Conditional execution” on page
SAM3S Preliminary
84.
117