ATMEGA64A-AU Atmel, ATMEGA64A-AU Datasheet - Page 99

MCU AVR 64K ISP FLASH 64-TQFP

ATMEGA64A-AU

Manufacturer Part Number
ATMEGA64A-AU
Description
MCU AVR 64K ISP FLASH 64-TQFP
Manufacturer
Atmel
Series
AVR® ATmegar
Datasheets

Specifications of ATMEGA64A-AU

Core Processor
AVR
Core Size
8-Bit
Speed
16MHz
Connectivity
I²C, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
53
Program Memory Size
64KB (32K x 16)
Program Memory Type
FLASH
Eeprom Size
2K x 8
Ram Size
4K x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 5.5 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
64-TQFP, 64-VQFP
Package
64TQFP
Device Core
AVR
Family Name
ATmega
Maximum Speed
16 MHz
Operating Supply Voltage
3.3|5 V
Data Bus Width
8 Bit
Number Of Programmable I/os
53
Interface Type
SPI/USART
On-chip Adc
8-chx10-bit
Number Of Timers
4
Processor Series
ATMEGA64x
Core
AVR8
Data Ram Size
4 KB
Maximum Clock Frequency
16 MHz
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
EWAVR, EWAVR-BL
Development Tools By Supplier
ATAVRDRAGON, ATSTK500, ATSTK600, ATAVRISP2, ATAVRONEKIT
Minimum Operating Temperature
- 40 C
Cpu Family
ATmega
Device Core Size
8b
Frequency (max)
16MHz
Total Internal Ram Size
4KB
# I/os (max)
53
Number Of Timers - General Purpose
4
Operating Supply Voltage (typ)
3.3/5V
Operating Supply Voltage (max)
5.5V
Operating Supply Voltage (min)
2.7V
Instruction Set Architecture
RISC
Operating Temp Range
-40C to 85C
Operating Temperature Classification
Industrial
Mounting
Surface Mount
Pin Count
64
Package Type
TQFP
For Use With
770-1007 - ISP 4PORT ATMEL AVR MCU SPI/JTAG
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
ATMEGA64A-AU
Manufacturer:
ATMEL
Quantity:
4 500
Part Number:
ATMEGA64A-AU
Manufacturer:
Atmel
Quantity:
900
Part Number:
ATMEGA64A-AU
Manufacturer:
ATMEL85
Quantity:
900
Part Number:
ATMEGA64A-AU
Manufacturer:
Atmel
Quantity:
10 000
Part Number:
ATMEGA64A-AU
Manufacturer:
ATMEL
Quantity:
8 000
Part Number:
ATMEGA64A-AU
Manufacturer:
AT
Quantity:
20 000
Company:
Part Number:
ATMEGA64A-AU
Quantity:
1 920
Company:
Part Number:
ATMEGA64A-AU
Quantity:
1 850
Company:
Part Number:
ATMEGA64A-AU
Quantity:
1 800
Company:
Part Number:
ATMEGA64A-AU
Quantity:
267
Company:
Part Number:
ATMEGA64A-AU
Quantity:
257
Part Number:
ATMEGA64A-AUR
Manufacturer:
Atmel
Quantity:
10 000
8160C–AVR–07/09
togram for illustrating the single-slope operation. The diagram includes non-inverted and
inverted PWM outputs. The small horizontal line marks on the TCNT0 slopes represent Com-
pare Matches between OCR0 and TCNT0.
Figure 14-6. Fast PWM Mode, Timing Diagram
The Timer/Counter Overflow Flag (TOV0) is set each time the counter reaches MAX. If the inter-
rupt is enabled, the interrupt handler routine can be used for updating the compare value.
In fast PWM mode, the compare unit allows generation of PWM waveforms on the OC0 pin. Set-
ting the COM01:0 bits to two will produce a non-inverted PWM and an inverted PWM output can
be generated by setting the COM01:0 to three (See
value will only be visible on the port pin if the data direction for the port pin is set as output. The
PWM waveform is generated by setting (or clearing) the OC0 Register at the Compare Match
between OCR0 and TCNT0, and clearing (or setting) the OC0 Register at the timer clock cycle
the counter is cleared (changes from MAX to BOTTOM).
The PWM frequency for the output can be calculated by the following equation:
The N variable represents the prescale factor (1, 8, 32, 64, 128, 256, or 1024).
The extreme values for the OCR0 Register represent special cases when generating a PWM
waveform output in the fast PWM mode. If the OCR0 is set equal to BOTTOM, the output will be
a narrow spike for each MAX+1 timer clock cycle. Setting the OCR0 equal to MAX will result in a
constantly high or low output (depending on the polarity of the output set by the COM01:0 bits.)
A frequency (with 50% duty cycle) waveform output in fast PWM mode can be achieved by set-
ting OC0 to toggle its logical level on each Compare Match (COM01:0 = 1). The waveform
generated will have a maximum frequency of f
ture is similar to the OC0 toggle in CTC mode, except the double buffer feature of the Output
Compare unit is enabled in the fast PWM mode.
TCNTn
OCn
OCn
Period
1
2
3
f
OCnPWM
4
oc0
=
= f
----------------- -
N 256
f
clk_I/O
clk_I/O
Table 14-4 on page
5
/2 when OCR0 is set to zero. This fea-
6
OCRn Interrupt Flag Set
OCRn Update and
TOVn Interrupt Flag Set
7
ATmega64A
107). The actual OC0
(COMn1:0 = 2)
(COMn1:0 = 3)
99

Related parts for ATMEGA64A-AU