ATMEGA64A-AU Atmel, ATMEGA64A-AU Datasheet - Page 247

MCU AVR 64K ISP FLASH 64-TQFP

ATMEGA64A-AU

Manufacturer Part Number
ATMEGA64A-AU
Description
MCU AVR 64K ISP FLASH 64-TQFP
Manufacturer
Atmel
Series
AVR® ATmegar
Datasheets

Specifications of ATMEGA64A-AU

Core Processor
AVR
Core Size
8-Bit
Speed
16MHz
Connectivity
I²C, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
53
Program Memory Size
64KB (32K x 16)
Program Memory Type
FLASH
Eeprom Size
2K x 8
Ram Size
4K x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 5.5 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
64-TQFP, 64-VQFP
Package
64TQFP
Device Core
AVR
Family Name
ATmega
Maximum Speed
16 MHz
Operating Supply Voltage
3.3|5 V
Data Bus Width
8 Bit
Number Of Programmable I/os
53
Interface Type
SPI/USART
On-chip Adc
8-chx10-bit
Number Of Timers
4
Processor Series
ATMEGA64x
Core
AVR8
Data Ram Size
4 KB
Maximum Clock Frequency
16 MHz
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
EWAVR, EWAVR-BL
Development Tools By Supplier
ATAVRDRAGON, ATSTK500, ATSTK600, ATAVRISP2, ATAVRONEKIT
Minimum Operating Temperature
- 40 C
Cpu Family
ATmega
Device Core Size
8b
Frequency (max)
16MHz
Total Internal Ram Size
4KB
# I/os (max)
53
Number Of Timers - General Purpose
4
Operating Supply Voltage (typ)
3.3/5V
Operating Supply Voltage (max)
5.5V
Operating Supply Voltage (min)
2.7V
Instruction Set Architecture
RISC
Operating Temp Range
-40C to 85C
Operating Temperature Classification
Industrial
Mounting
Surface Mount
Pin Count
64
Package Type
TQFP
For Use With
770-1007 - ISP 4PORT ATMEL AVR MCU SPI/JTAG
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

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23.9
23.9.1
8160C–AVR–07/09
Register Description
ADMUX – ADC Multiplexer Selection Register
Table 23-2.
Example:
ADMUX = 0xED (ADC3 - ADC2, 10x gain, 2.56V reference, left adjusted result).
Voltage on ADC3 is 300 mV, voltage on ADC2 is 500 mV.
ADCR = 512 * 10 * (300 - 500) / 2560 = -400 = 0x270.
ADCL will thus read 0x00, and ADCH will read 0x9C. Writing zero to ADLAR right adjusts the
result: ADCL = 0x70, ADCH = 0x02.
• Bit 7:6 – REFS1:0: Reference Selection Bits
These bits select the voltage reference for the ADC, as shown in
changed during a conversion, the change will not go in effect until this conversion is complete
(ADIF in ADCSRA is set). The internal voltage reference options may not be used if an external
reference voltage is being applied to the AREF pin.
Table 23-3.
Bit
0x07 (0x27)
Read/Write
Initial Value
V
V
V
:.
V
V
V
:.
V
V
V
REFS1
ADCn
ADCm
ADCm
ADCm
ADCm
ADCm
ADCm
ADCm
ADCm
0
0
1
1
+ 511/512 V
+ 510/512 V
+ 1/512 V
- 1/512 V
- 511/512V
- V
+ V
REF
REF
REFS0
/GAIN
/GAIN
REFS1
Correlation Between Input Voltage and Output Codes
Voltage Reference Selections for ADC
R/W
0
1
0
1
REF
REF
7
0
REF
REF
REF
/GAIN
/GAIN
/GAIN
/GAIN
/GAIN
Voltage Reference Selection
AREF, Internal Vref turned off.
AVCC with external capacitor at AREF pin.
Reserved
Internal 2.56V Voltage Reference with external capacitor at AREF pin.
REFS0
R/W
6
0
ADLAR
R/W
5
0
Read Code
0x1FF
0x1FF
0x1FE
:.
0x001
0x000
0x3FF
:.
0x201
0x200
MUX4
R/W
4
0
MUX3
R/W
3
0
MUX2
Corresponding Decimal Value
R/W
2
0
Table
MUX1
R/W
1
0
ATmega64A
-511
-512
511
511
510
23-3. If these bits are
-1
:.
1
0
:.
MUX0
R/W
0
0
ADMUX
247

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