ATMEGA64A-AU Atmel, ATMEGA64A-AU Datasheet - Page 296

MCU AVR 64K ISP FLASH 64-TQFP

ATMEGA64A-AU

Manufacturer Part Number
ATMEGA64A-AU
Description
MCU AVR 64K ISP FLASH 64-TQFP
Manufacturer
Atmel
Series
AVR® ATmegar
Datasheets

Specifications of ATMEGA64A-AU

Core Processor
AVR
Core Size
8-Bit
Speed
16MHz
Connectivity
I²C, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
53
Program Memory Size
64KB (32K x 16)
Program Memory Type
FLASH
Eeprom Size
2K x 8
Ram Size
4K x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 5.5 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
64-TQFP, 64-VQFP
Package
64TQFP
Device Core
AVR
Family Name
ATmega
Maximum Speed
16 MHz
Operating Supply Voltage
3.3|5 V
Data Bus Width
8 Bit
Number Of Programmable I/os
53
Interface Type
SPI/USART
On-chip Adc
8-chx10-bit
Number Of Timers
4
Processor Series
ATMEGA64x
Core
AVR8
Data Ram Size
4 KB
Maximum Clock Frequency
16 MHz
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
EWAVR, EWAVR-BL
Development Tools By Supplier
ATAVRDRAGON, ATSTK500, ATSTK600, ATAVRISP2, ATAVRONEKIT
Minimum Operating Temperature
- 40 C
Cpu Family
ATmega
Device Core Size
8b
Frequency (max)
16MHz
Total Internal Ram Size
4KB
# I/os (max)
53
Number Of Timers - General Purpose
4
Operating Supply Voltage (typ)
3.3/5V
Operating Supply Voltage (max)
5.5V
Operating Supply Voltage (min)
2.7V
Instruction Set Architecture
RISC
Operating Temp Range
-40C to 85C
Operating Temperature Classification
Industrial
Mounting
Surface Mount
Pin Count
64
Package Type
TQFP
For Use With
770-1007 - ISP 4PORT ATMEL AVR MCU SPI/JTAG
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

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27.2
8160C–AVR–07/09
Fuse Bits
Table 27-2.
Note:
The ATmega64A has three fuse bytes.
of all the fuses and how they are mapped into the fuse bytes. Note that the fuses are read as
logical zero, “0”, if they are programmed.
Table 27-3.
Note:
Fuse Low Byte
M103C
WDTON
1
2
3
4
(1)
1. Program the Fuse bits before programming the Lock bits.
2. “1” means unprogrammed, “0” means programmed
1. See
2. See
(2)
Memory Lock Bits
Lock Bit Protection Modes
Extended Fuse Byte
“ATmega103 and ATmega64A Compatibility” on page 4
“WDTCR – Watchdog Timer Control Register” on page 57
1
1
0
0
Bit no
7
6
5
4
3
2
1
0
1
0
0
1
Description
ATmega103 compatibility mode
Watchdog Timer always on
Protection Type
No restrictions for SPM or LPM accessing the Boot Loader
section.
SPM is not allowed to write to the Boot Loader section.
SPM is not allowed to write to the Boot Loader section, and LPM
executing from the Application section is not allowed to read
from the Boot Loader section. If Interrupt Vectors are placed in
the Application section, interrupts are disabled while executing
from the Boot Loader section.
LPM executing from the Application section is not allowed to
read from the Boot Loader section. If Interrupt Vectors are
placed in the Application section, interrupts are disabled while
executing from the Boot Loader section.
Table 27-3
(2)
(Continued)
-
Table 27-5
describe briefly the functionality
for details.
for details.
ATmega64A
Default Value
1
1
1
1
1
1
0 (programmed)
1 (unprogrammed)
296

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