AT32UC3B1256-AUR Atmel, AT32UC3B1256-AUR Datasheet - Page 270

MCU AVR32 256K FLASH 48-TQFP

AT32UC3B1256-AUR

Manufacturer Part Number
AT32UC3B1256-AUR
Description
MCU AVR32 256K FLASH 48-TQFP
Manufacturer
Atmel
Series
AVR®32 UC3r
Datasheet

Specifications of AT32UC3B1256-AUR

Package / Case
48-TQFP, 48-VQFP
Voltage - Supply (vcc/vdd)
1.65 V ~ 1.95 V
Operating Temperature
-40°C ~ 85°C
Speed
60MHz
Number Of I /o
28
Core Processor
AVR
Program Memory Type
FLASH
Ram Size
32K x 8
Program Memory Size
256KB (256K x 8)
Data Converters
A/D 6x10b
Oscillator Type
Internal
Peripherals
Brown-out Detect/Reset, DMA, POR, PWM, WDT
Connectivity
I²C, IrDA, SPI, SSC, UART/USART, USB
Core Size
32-Bit
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-

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Figure 20-9. Receiver Block Diagram
20.7.4
32059J–12/2010
T ran sm itte r
D ivid e r
R X _C L O C K
C lo ck
C lo ck
Start
The transmitter and receiver can both be programmed to start their operations when an event
occurs, respectively in the Transmit Start Selection field of the TCMR register (TCMR.START)
and in the Receive Start Selection field of the RCMR register (RCMR.START).
Under the following conditions the start event is independently programmable:
• Continuous: in this case, the transmission starts as soon as a word is written to the THR
• Synchronously with the transmitter/receiver
• On detection of a falling/rising edge on TX_FRAME_SYNC/RX_FRAME_SYNC
• On detection of a low/high level on TX_FRAME_SYNC/RX_FRAME_SYNC
• On detection of a level change or an edge on TX_FRAME_SYNC/RX_FRAME_SYNC
A start can be programmed in the same manner on either side of the Transmit/Receive Clock
Mode Register (TCMR/RCMR). Thus, the start could be on TX_FRAME_SYNC (transmit) or
RX_FRAME_SYNC (receive).
Moreover, the receiver can start when data is detected in the bit stream with the compare func-
tions. See
Detection on TX_FRAME_SYNC input/output is done by the Transmit Frame Sync Output
Selection field in the TFMR register (TFMR.FSOS). Similarly, detection on RX_FRAME_SYNC
input/output is done by the Receive Frame Output Sync Selection field in the RFMR register
(RFMR.FSOS).
register and the reception starts as soon as the receiver is enabled
M U X
C K S
Section 20.7.6
C K O
for more details on receive compare modes.
C o n tro ller
T ri-sta te
M U X
IN V
C K I
D a ta T ran sfer
C on tro lle r
T ri-sta te
C K G
AT32UC3B
R e ce iver
O u tp u t
C lock
C lo ck
270

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