AT32UC3B1256-AUR Atmel, AT32UC3B1256-AUR Datasheet - Page 220

• Manufacturer Part Number: AT32UC3B1256-AUR
• Description: MCU AVR32 256K FLASH 48-TQFP
• Manufacturer: Atmel
• Series: AVR®32 UC3r

Specifications of AT32UC3B1256-AUR

• Package / Case: 48-TQFP, 48-VQFP
• Voltage - Supply (vcc/vdd): 1.65 V ~ 1.95 V
• Operating Temperature: -40°C ~ 85°C
• Speed: 60MHz
• Number Of I /o: 28
• Core Processor: AVR
• Program Memory Type: FLASH
• Ram Size: 32K x 8
• Program Memory Size: 256KB (256K x 8)
• Data Converters: A/D 6x10b
• Oscillator Type: Internal
• Peripherals: Brown-out Detect/Reset, DMA, POR, PWM, WDT
• Connectivity: I²C, IrDA, SPI, SSC, UART/USART, USB
• Core Size: 32-Bit
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

19. Two-Wire Interface (TWI)
19.1
19.2
32059J–12/2010
Features
Overview
2.1.1.0
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Note:
The Atmel Two-wire Interface (TWI) interconnects components on a unique two-wire bus, made
up of one clock line and one data line with speeds of up to 400 Kbits per second, based on a
byte-oriented transfer format. It can be used with any Atmel Two-wire Interface bus Serial
EEPROM and I²C compatible device such as Real Time Clock (RTC), Dot Matrix/Graphic LCD
Controllers and Temperature Sensor, to name but a few. The TWI is programmable as a master
or a slave with sequential or single-byte access. Multiple master capability is supported. Arbitra-
tion of the bus is performed internally and puts the TWI in slave mode automatically if the bus
arbitration is lost.
A configurable baud rate generator permits the output data rate to be adapted to a wide range of
core clock frequencies.
Below,
a full I
Table 19-1.
Note:
I2C Standard
Standard Mode Speed (100 KHz)
Fast Mode Speed (400 KHz)
7 or 10 bits Slave Addressing
START BYTE
Repeated Start (Sr) Condition
ACK and NACK Management
Slope control and input filtering (Fast mode)
Clock stretching
Compatible with Atmel Two-wire Interface Serial Memory and I²C Compatible Devices
One, Two or Three Bytes for Slave Address
Sequential Read-write Operations
Master, Multi-master and Slave Mode Operation
Bit Rate: Up to 400 Kbits
General Call Supported in Slave mode
Connection to Peripheral DMA Controller Channel Capabilities Optimizes Data Transfers in
Master Mode Only
– One Channel for the Receiver, One Channel for the Transmitter
– Next Buffer Support
2
C compatible device.
Table 19-1
1. See
1. START + b000000001 + Ack + Sr
(1)
Atmel TWI compatibility with I
Table 19-1
lists the compatibility level of the Atmel Two-wire Interface in Master Mode and
below for details on compatibility with I²C Standard.
2
C Standard
Atmel TWI
Supported
Supported
Supported
Not Supported
Supported
Supported
Not Supported
Supported
AT32UC3B
(1)
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