AT32UC3B1256-AUR Atmel, AT32UC3B1256-AUR Datasheet - Page 227

• Manufacturer Part Number: AT32UC3B1256-AUR
• Description: MCU AVR32 256K FLASH 48-TQFP
• Manufacturer: Atmel
• Series: AVR®32 UC3r

Specifications of AT32UC3B1256-AUR

• Package / Case: 48-TQFP, 48-VQFP
• Voltage - Supply (vcc/vdd): 1.65 V ~ 1.95 V
• Operating Temperature: -40°C ~ 85°C
• Speed: 60MHz
• Number Of I /o: 28
• Core Processor: AVR
• Program Memory Type: FLASH
• Ram Size: 32K x 8
• Program Memory Size: 256KB (256K x 8)
• Data Converters: A/D 6x10b
• Oscillator Type: Internal
• Peripherals: Brown-out Detect/Reset, DMA, POR, PWM, WDT
• Connectivity: I²C, IrDA, SPI, SSC, UART/USART, USB
• Core Size: 32-Bit
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

19.10.7.1
Figure 19-11. Master Write with One, Two or Three Bytes Internal Address and One Data Byte
32059J–12/2010
TWD
TWD
TWD
Three bytes internal address
Two bytes internal address
One byte internal address
S
S
S
7-bit Slave Addressing
DADR
DADR
DADR
When Addressing 7-bit slave devices, the internal address bytes are used to perform random
address (read or write) accesses to reach one or more data bytes, within a memory page loca-
tion in a serial memory, for example. When performing read operations with an internal address,
the TWI performs a write operation to set the internal address into the slave device, and then
switch to Master Receiver mode. Note that the second start condition (after sending the IADR) is
sometimes called “repeated start” (Sr) in I2C fully-compatible devices. See
Figure 19-11
The three internal address bytes are configurable through the Master Mode register (MMR).
If the slave device supports only a 7-bit address, i.e. no internal address, IADRSZ must be set to
0.
n the figures below the following abbreviations are used:I
•S
•Sr
•P
•W
•R
•A
•N
•DADR
•IADR
W
W
W
A
A
A
and
IADR(23:16)
IADR(15:8)
IADR(7:0)
Start
Repeated Start
Stop
Write
Read
Acknowledge
Not Acknowledge
Device Address
Internal Address
Figure 19-13
A
A
A
for Master Write operation with internal address.
IADR(15:8)
IADR(7:0)
DATA
A
A
A
IADR(7:0)
P
DATA
A
A
P
DATA
AT32UC3B
Figure
A
19-12. See
P
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