ATA6616-P3PW Atmel, ATA6616-P3PW Datasheet - Page 79

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ATA6616-P3PW

Manufacturer Part Number
ATA6616-P3PW
Description
TXRX MULTICHIP MOD LIN SIP 38QFN
Manufacturer
Atmel
Series
AVR® ATA66 LIN-SBCr
Datasheet

Specifications of ATA6616-P3PW

Core Processor
AVR
Core Size
8-Bit
Speed
16MHz
Connectivity
I²C, LIN, SPI, UART/USART, USI
Peripherals
Brown-out Detect/Reset, POR, PWM, Temp Sensor, WDT
Number Of I /o
16
Program Memory Size
8KB (8K x 8)
Program Memory Type
FLASH
Eeprom Size
512 x 8
Ram Size
512 x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 5.5 V
Data Converters
A/D 11x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 125°C
Package / Case
38-VQFN
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
4.7.3.2
9132D–AUTO–12/10
Clock monitoring
The following code example shows one assembly and one C function for changing the
time-out value of the Watchdog Timer.
The Watchdog Timer can be used to detect a loss of system clock. This configuration is driven
by the dynamic clock switch circuit. Please refer to
59
Assembly Code Example
C Code Example
Notes:
for more information.
WDT_Prescaler_Change:
void WDT_Prescaler_Change(void)
{
}
; Turn off global interrupt
cli
; Reset Watchdog Timer
wdr
; Start timed sequence
lds r16, WDTCR
ori
sts WDTCR, r16
; -- Got four cycles to set the new values from here -
; Set new prescaler(time-out) value = 64K cycles (~0.5 s)
ldi
sts WDTCR, r16
; -- Finished setting new values, used 2 cycles -
; Turn on global interrupt
sei
ret
__disable_interrupt();
__watchdog_reset();
/* Start timed sequence */
WDTCR |= (1<<WDCE) | (1<<WDE);
/* Set new prescaler(time-out) value = 64K cycles (~0.5 s) */
WDTCR
__enable_interrupt();
1. See
2. The Watchdog Timer should be reset before any change of the WDP bits, since a change
in the WDP bits can result in a time-out when switching to a shorter time-out period.
r16, (1<<WDCE) | (1<<WDE)
r16, (1<<WDE) | (1<<WDP2) | (1<<WDP0)
= (1<<WDE) | (1<<WDP2) | (1<<WDP0);
Section 4.2.7 “About Code Examples” on page 31
(1)
(1)
Atmel ATA6616/ATA6617
Section 4.5.3.8 “Clock Monitoring” on page
79

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